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b. Cache memory systems are designed such that the computer first checks the L1 cache for the desired memory. If the data is there, it accesses it and is done. It only checks the L2 cache if the data is not found in the L1 cache. Likewise, the computer checks the L3 cache if the desired data is not found in the L2 cache, and finally it on only checks main memory if the data is not found in the L3 cache. Imagine a computer system with the following cache access times: L1 cache: 3 processor cycles L2 cache: 10 processor cycles L3 cache: 25 processor cycles Main memory: 100 processor cycles ▪ So, in the best case, the desired data-would be immediately found in the L1 cache, which requires only 3 cycles to check. Conversely, in the worst case, the desired data would only be in main memory, which would require 138 cycles to access (3 cycles to check L1 cache + 10 cycles to check L2 + 25 cycles to check L3 + 100 cycles to access main memory). What is important, however, is the average amount of time it takes to get the desired data. Imagine an application running on this system, whose data set exhibits the following average properties: ▪ when accessing the L1 cache, 96% of the time the desired data is in the L1 cache (i.e. the L1 hit rate is 96%) ▪ when accessing the L2 cache, 75% of the time the desired data is in the L2 cache (i.e. the L2 hit rate is 75%) when accessing the L3 cache, 60% of the time the desired data is in the L3 cache (i.e. the L3 hit rate is 60%) otherwise, the desired data is in main memory (i.e. main memory's hit rate is assumed to be 100%) Given the averages listed above, how long on average would the processor take to access the desired memory?

b. Cache memory systems are designed such that the computer first checks the L1 cache for the desired memory. If the data is there, it accesses it and is done. It only checks the L2 cache if the data is not found in the L1 cache. Likewise, the computer checks the L3 cache if the desired data is not found in the L2 cache, and finally it on only checks main memory if the data is not found in the L3 cache. Imagine a computer system with the following cache access times: L1 cache: 3 processor cycles L2 cache: 10 processor cycles L3 cache: 25 processor cycles Main memory: 100 processor cycles ▪ So, in the best case, the desired data-would be immediately found in the L1 cache, which requires only 3 cycles to check. Conversely, in the worst case, the desired data would only be in main memory, which would require 138 cycles to access (3 cycles to check L1 cache + 10 cycles to check L2 + 25 cycles to check L3 + 100 cycles to access main memory). What is important, however, is the average amount of time it takes to get the desired data. Imagine an application running on this system, whose data set exhibits the following average properties: ▪ when accessing the L1 cache, 96% of the time the desired data is in the L1 cache (i.e. the L1 hit rate is 96%) ▪ when accessing the L2 cache, 75% of the time the desired data is in the L2 cache (i.e. the L2 hit rate is 75%) when accessing the L3 cache, 60% of the time the desired data is in the L3 cache (i.e. the L3 hit rate is 60%) otherwise, the desired data is in main memory (i.e. main memory's hit rate is assumed to be 100%) Given the averages listed above, how long on average would the processor take to access the desired memory?

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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b. Cache memory systems are designed such that the computer first checks the L1 cache for the desired memory. If the data is there, it accesses it and is done. It only checks the L2 cache if the data is not found in the L1 cache. Likewise, the computer checks the L3 cache if the desired data is not found in the L2 cache, and finally it on only checks main memory if the data is not found in the L3 cache. Imagine a computer system with the following cache access times: L1 cache: 3 processor cycles L2 cache: 10 processor cycles L3 cache: 25 processor cycles Main memory: 100 processor cycles So, in the best case, the desired data-would be immediately found in the L1 cache, which requires only 3 cycles to check. Conversely, in the worst case, the desired data would only be in main memory, which would require 138 cycles to access (3 cycles to check L1 cache + 10 cycles to check L2 + 25 cycles to check L3 + 100 cycles to access main memory). What is important, however, is the average amount of time it takes to get the desired data. Imagine an application running on this system, whose data set exhibits the following average properties: ▪ when accessing the L1 cache, 96% of the time the desired data is in the L1 cache (i.e. the L1 hit rate is 96%) ▪ when accessing the L2 cache, 75% of the time the desired data is in the L2 cache (i.e. the L2 hit rate is 75%) when accessing the L3 cache, 60% of the time the desired data is in the L3 cache (i.e. the L3 hit rate is 60%) otherwise, the desired data is in main memory (i.e. main memory's hit rate is assumed to be 100%) Given the averages listed above, how long on average would the processor take to access the desired memory?
Transcribed Image Text:b. Cache memory systems are designed such that the computer first checks the L1 cache for the desired memory. If the data is there, it accesses it and is done. It only checks the L2 cache if the data is not found in the L1 cache. Likewise, the computer checks the L3 cache if the desired data is not found in the L2 cache, and finally it on only checks main memory if the data is not found in the L3 cache. Imagine a computer system with the following cache access times: L1 cache: 3 processor cycles L2 cache: 10 processor cycles L3 cache: 25 processor cycles Main memory: 100 processor cycles So, in the best case, the desired data-would be immediately found in the L1 cache, which requires only 3 cycles to check. Conversely, in the worst case, the desired data would only be in main memory, which would require 138 cycles to access (3 cycles to check L1 cache + 10 cycles to check L2 + 25 cycles to check L3 + 100 cycles to access main memory). What is important, however, is the average amount of time it takes to get the desired data. Imagine an application running on this system, whose data set exhibits the following average properties: ▪ when accessing the L1 cache, 96% of the time the desired data is in the L1 cache (i.e. the L1 hit rate is 96%) ▪ when accessing the L2 cache, 75% of the time the desired data is in the L2 cache (i.e. the L2 hit rate is 75%) when accessing the L3 cache, 60% of the time the desired data is in the L3 cache (i.e. the L3 hit rate is 60%) otherwise, the desired data is in main memory (i.e. main memory's hit rate is assumed to be 100%) Given the averages listed above, how long on average would the processor take to access the desired memory?
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