Q2. We will design a Mealy sequence detector that makes output, Z=1, when it detects 1001 in the serial data stream. X. Overlapping of sequences is allowed, and an example is given below: t=0 t=1 t=2 t=3 t=4 t=5 t=6 t=7 t=8 t=9 t=10 t=11| t=12 X0 1 1 1 1 1 1 1 1 a) Draw a state diagram for a Mealy FSM. b) Design a circuit that uses Shift Registers to detect the sequence. Use a minimum number of components.
Q2. We will design a Mealy sequence detector that makes output, Z=1, when it detects 1001 in the serial data stream. X. Overlapping of sequences is allowed, and an example is given below: t=0 t=1 t=2 t=3 t=4 t=5 t=6 t=7 t=8 t=9 t=10 t=11| t=12 X0 1 1 1 1 1 1 1 1 a) Draw a state diagram for a Mealy FSM. b) Design a circuit that uses Shift Registers to detect the sequence. Use a minimum number of components.
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Transcribed Image Text:Q2. We will design a Mealy sequence detector that makes output, Z=1, when it detects 1001 in the serial data
stream. X. Overlapping of sequences is allowed, and an example is given below:
t=0 t=1 t-2t-3 t-4 t=5t-6 t=7 t-8 t-9 t-10 t-11 t=12
X 0
1
1
1
1
1
1
1
1
a) Draw a state diagram for a Mealy FSM.
b) Design a circuit that uses Shift Registers to detect the sequence. Use a minimum number of components.
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