Q2. Two integer numbers A and B are represented in pure binary by two bits, being A=a₁a0 and B=b₁bo. A logic circuit provides the 4 bits output C=C3C2C1C0, as shown in the truth table below. a₁ 0 0 ‒111OOOOOOOO 0 0 0 0 0 ao 1 1 1 1 o 0 0 0 0 1 0 1 0 0 0 1 1 1 1 b₁ 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 og bo 1 0 1 0 1 O. 0 C3 0 0 1 0 1 0 0 0 0 1 0 0 OOO 0 0 0 0 0 C2 0 0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 OO 0 1 C1 1 1 0 0 1 1 TO-Ooooo 0 1 0 0 0 0 1 OTO 0 1 0 0 oooo 8 Co 1 1 1 0 OOO 0 0 1 1 OoOoO 0 0 0 0 g) Draw the logic circuit for the expression G = A. B using NAND gates only. Ensure the minimum number of NAND gates possible are used.

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Q2. Two integer numbers A and B are represented in pure binary by two bits, being
A=a₁a0 and B=b₁bo.
A logic circuit provides the 4 bits output C=C3C2C1C0, as shown in the truth table
below.
a₁
0
0
‒111OOOOOOOO
0
0
0
0
0
ao
1
1
1
1
o
0
0
0
0 1
0
1
0
0
0
1
1
1
1
b₁
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
og
bo
1
0
1
0
1
O.
0
C3
0
0
1
0
1
0
0
0
0
1 0
0
OOO
0
0
0
0
0
C2
0
0
0
0
0
0
1
0
0 0
1
1
0 1 0
0
OO
0
1
C1
1
1
0
0
1
1
TO-Ooooo
0
1
0
0
0
0
1
OTO
0
1
0
0
oooo
8
Co
1
1
1
0
OOO
0
0
1
1
OoOoO
0
0
0
0
g) Draw the logic circuit for the expression G = A. B using NAND gates only.
Ensure the minimum number of NAND gates possible are used.
Transcribed Image Text:Q2. Two integer numbers A and B are represented in pure binary by two bits, being A=a₁a0 and B=b₁bo. A logic circuit provides the 4 bits output C=C3C2C1C0, as shown in the truth table below. a₁ 0 0 ‒111OOOOOOOO 0 0 0 0 0 ao 1 1 1 1 o 0 0 0 0 1 0 1 0 0 0 1 1 1 1 b₁ 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 og bo 1 0 1 0 1 O. 0 C3 0 0 1 0 1 0 0 0 0 1 0 0 OOO 0 0 0 0 0 C2 0 0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 OO 0 1 C1 1 1 0 0 1 1 TO-Ooooo 0 1 0 0 0 0 1 OTO 0 1 0 0 oooo 8 Co 1 1 1 0 OOO 0 0 1 1 OoOoO 0 0 0 0 g) Draw the logic circuit for the expression G = A. B using NAND gates only. Ensure the minimum number of NAND gates possible are used.
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