Si transistor has ICEO = 0, B = 100, Rc=2kQ, Vcc=12 V. Assume that; (VCEQ = Vcc /2). The circuit of Figure below uses current- (or shunt-) feedback bias. The +Vcc find RC Cc 1. The value of IgQ RF 2. The value of RF lic Rs VL RL Cc R. R; Q2. The circuit below uses current- (or shunt-) feedback bias. The Si transistor has Iceo 0, VCEsat =, and hff (B) = 100. If Rc = 2kN and Vcc = 12 V, design Rp for ideal maximum symmetrical swing (thatis, location of the quiescent point such that Vceq = Vcc/2. (2)+VcSRCCc6RE4igR1USR,R,

Given: ICEO =0,β=100Rc=2kΩVcc=12VAssume that VCEQ=Vcc2 Circuit:

Answered: Q2. The circuit below uses current- (or…

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

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Si transistor has ICEO = 0, B = 100, Rc=2kQ, Vcc=12 V. Assume that; (VCEQ = Vcc /2). The circuit of Figure below uses current- (or shunt-) feedback bias. The +Vcc find RC Cc 1. The value of IgQ RF 2. The value of RF lic Rs VL RL Cc R. R;

Q2. The circuit below uses current- (or shunt-) feedback bias. The Si transistor has Iceo 0, VCEsat =
, and hff (B) = 100. If Rc = 2kN and Vcc = 12 V, design Rp for ideal maximum symmetrical swing (that
is, location of the quiescent point such that Vceq = Vcc/2. (2)
+Vc
SRC
Cc
6
RE
4
ig
R1
US
R,
R,

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