Q.2. The content of PC in the basic computer architecture (as shown in the figure below) is 3AF. The content of AC is 7EC3. The content of memory at address 3AF is A32E. The content of memory at address 32E is 09AC. The content of memory at 9AC is 8B9F. The next two contents of PC are 3B0 and 3B1. The content of memory at address 3B0 is 1340 and the content of memory at 340 is 10B0. The content of memory at address 3B1 is 3345. Identify each register values mentioned in the question and update accordingly according to the sequence of PC value.
Q.2. The content of PC in the basic computer architecture (as shown in the figure below) is 3AF. The content of AC is 7EC3. The content of memory at address 3AF is A32E. The content of memory at address 32E is 09AC. The content of memory at 9AC is 8B9F. The next two contents of PC are 3B0 and 3B1. The content of memory at address 3B0 is 1340 and the content of memory at 340 is 10B0. The content of memory at address 3B1 is 3345. Identify each register values mentioned in the question and update accordingly according to the sequence of PC value.
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Q.2. The content of PC in the basic computer architecture (as shown in the figure below) is 3AF. The content of AC is 7EC3. The content of memory at address 3AF is A32E. The content of memory at address 32E is 09AC. The content of memory at 9AC is 8B9F. The next two contents of PC are 3B0 and 3B1. The content of memory at address 3B0 is 1340 and the content of memory at 340 is 10B0. The content of memory at address 3B1 is 3345. Identify each register values mentioned in the question and update accordingly according to the sequence of PC value.
Transcribed Image Text:Surt
SC-0
AR PC
IR +M [AR). PC + PCc + 1
Decode operation code in IR (12 – 14)
AR + IR (0 – 11). I – IR (15)
(Register or L/0) =1
=0 (Memory-reference)
D
(UO) = 1
=0 (register)
(indirect) =1
=0 (direct)
Ts
AR- MAR
Execute
Execute
Nothing
imput-output
instruction
register reference
instruction
SC -0
Execute
memory-reference
instruction
SC-0
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