Q. For the given circuit, which of the following is correct? 1 AO 1 A1 O A2 O A3 1 A4 O A5 1 A6 1 A7 RAM 256 X 4 A. The number 5 is being written to the memory at address location 203. B. The chip has not been enabled, since the EN terminal is 0; therefore, nothing will be written to the chip and the output is tri- stated. A 255 QC O DO 1 D1 O D2 1 D3 C. Decimal 10 is being written into memory Q= location 211. D. The read/write line is LOW; therefore, decimal 5 is being stored at memory O R/W O CS WRITE READ EN location 211. Data inputs Address inputs

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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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WRITE
Chapter #2 Data Storage
HW # 02
Q. For the given circuit, which of the following is correct?
1 AO
1 A1
RAM
256 X 4
A. The number 5 is being written to the
memory at address location 203.
B. The chip has not been enabled, since the
EN terminal is 0; therefore, nothing will be
written to the chip and the output is tri-
A2
O A3
A4
255
O A5
A6
1.
1 A7
stated.
O DO
1 D1
O D2
1 D3
C. Decimal 10 is being written into memory
Q2
location 211.
D. The read/write line is LOW; therefore,
decimal 5 is being stored at memory
WRITE
READ
O CS
O R/W
location 211.
EN
Electrical Engineering Department/ University of Basrah
Data
Address
inputs
inputs
DDD D
Data
sandano
Transcribed Image Text:WRITE Chapter #2 Data Storage HW # 02 Q. For the given circuit, which of the following is correct? 1 AO 1 A1 RAM 256 X 4 A. The number 5 is being written to the memory at address location 203. B. The chip has not been enabled, since the EN terminal is 0; therefore, nothing will be written to the chip and the output is tri- A2 O A3 A4 255 O A5 A6 1. 1 A7 stated. O DO 1 D1 O D2 1 D3 C. Decimal 10 is being written into memory Q2 location 211. D. The read/write line is LOW; therefore, decimal 5 is being stored at memory WRITE READ O CS O R/W location 211. EN Electrical Engineering Department/ University of Basrah Data Address inputs inputs DDD D Data sandano
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