Problem: A 1024 × 1024 array of 32-bit numbers is to be normalized as follows. For each column, the largest element is found and all elements of the column are divided by the value of this element. Assume that each page in the virtual memory consists of 4K bytes, and that 1M bytes of the main memory are allocated for storing array data during this computation. Assume that it takes 10 ms to load a page from the disk into the main memory when a page fault occurs. (a) Assume that the array is processed one column at a time. How many page faults would occur and how long does it take to complete the normalization process if the elements of the array are stored in column order in the virtual memory? (b) Repeat part (a) assuming the elements are stored in row order?

Problem: A 1024 × 1024 array of 32-bit numbers is to be normalized as follows. For each column, the largest element is found and all elements of the column are divided by the value of this element. Assume that each page in the virtual memory consists of 4K bytes, and that 1M bytes of the main memory are allocated for storing array data during this computation. Assume that it takes 10 ms to load a page from the disk into the main memory when a page fault occurs. (a) Assume that the array is processed one column at a time. How many page faults would occur and how long does it take to complete the normalization process if the elements of the array are stored in column order in the virtual memory? (b) Repeat part (a) assuming the elements are stored in row order?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

An integer array [41,11,121,163] is stored in memory. Each integer has 32 bits. Suppose the first byte of the array data has a hexadecimal address of F8D4A0C8, and the content of the $s4 register is also F8D4A0C8 in hexadecimal. List the integer values in decimal in the array starting with element 0, after the following MIPS code is executed. Separated them by comma, for example, 11,22,33,44. lw $t5, 0($s4) lw $t4, 12($s4) add $t4, $t5, $t4 Sw $t4, 0($s4) Answer:
There are many parameters that could be used to describe disk performance; among them are: number of bits per track disk capacity (in bits) number of disk surfaces rotational speed rotational latency transfer rate tracks per surface sectors per track blocks per track sectors per block seek time speed of disk arm block-read time number of blocks Some of these parameters are independent, and others are (approximately) linearly related. That is, doubling one doubles the other. Decide which of these parameters are linearly related. Then, select from the list below, the relationship that is true, to within a close approximation. Note: none of the statements may be true exactly, but one will always be much closer to the truth than the other three. Also note: you should assume all dimensions and parameters of the disk are unchanged except for the ones mentioned. a) If you divide tracks into half as many blocks, then you double the read time for a block.…
(b) The following Figure 2 illustrates the memory allocation with its content for a variable declared (MyValue) in word size. Adsress: Value: Address: Value: D1 AB 00406000: 00406006: 13 00406001: 02 00406007: 00406002: 39 00406008: OE 00406003: 00 00406009: CD 00406004: OE 0040600A: AB 00406005: CD 0040600B: 02 Figure 2 If the value of 02ABh from the memory needs to be loaded into an accumulator register, complete the following instruction to execute it. MOV , MyValue +
Computer Science You are given a cache that has 16 byte blocks, 512 sets, and is 2-way set associative. Integers are 4 bytes. Give the C code for a loop that has a 100% miss rate in this cache but whose hit rate rises to almost 100% if you double the size of the cache. Do not assume the starting indexes of any arraysarrays.
The memory access time is I nanosecond for read operation with a hit in cache. * nanoseconds for a read operation with a miss in cache, 2 nanoseconds for a write operation with a hit in cache and 10 anoseconds for a write operation with a miss in cache. Execution of a sequence of instructions involves 100 instruction fetch operations, 60 memory operand read operations and 40 memory operand write operations. The cache hit-ratio is 0.9. The average memory access time (in nanoseconds) in executing the sequence of instructions is
8. Assume you are working in Grameenphone, and you are asked to manage records of 70 million users by their Phone numbers. You are asked to store these numbers and perform frequent searches, insertion, and deletion on them. Each record size is about 10KB (Kilobytes). Any array in your system can hold at most 4GB (Gigabytes) of data. How would you design the data structure to hold the record? Answer this based on your data structure knowledge on Arrays, Various kind of linked lists, Trees, Graph and/or Hash Tables. Discuss your choice based on space and runtime complexity.
Give the formula for computing the starting byte address of the Kth element of a 1–D array whose first element starts at address A, and each element is of size S.
3-lf we assume we place the following MIPS code starting at location 80800 in memory, what is the MIPS machine code for this code? Assume that i , j and k correspond to registers $s3 , $s4 and $s5 and the base of the array save is in $s6. Please also explain each instruction and specify its type ( R format, I format, or J format). Finally convert the following code to C. addi $5,$zero,0 Loop: sll $t1,$s3,2 $t1,$t1,$s6 $t0,0($t1) $t0,$s5, Exit $4,$s3, 1 $s4,$s4,$t0 $s3,$s3,1 add Iw bne sll sub addi į Loop Exit
1- Write a MIPS assembly program that stores the values in consecutive successive words in the data segment with the initial offset 3000A, ending at offset 3FFEB. Then store the value 3000F to location 1000F. Next, write a code segment that sums the 128 words starting at the address found in location 1000F. This portion of the program cannot assume that 1000B contains 3000A. Print the sum and then quit. 2- Write a MIPS program that access an array of words starting at address 1000F and memory, of the length specified by the value in cx, and searches the maximum value in the array. Print the value after finding an element. 3- Write a MIPS assembly language program to reverse the numbers for two dimensional array of size 4X4
Assume that the arrays uses a row-major if it is an even dimension and uses column-major if it is odd dimension way of accessing the elements. If the array has multiple dimensions all the dimensions should be either odd or even. Write the SDT's to generate 3-address code for such an array and use it to generate three address code for the following: x = a[i]li] + b(i]ljl %3D
I need the answer as soon as possible
RAM: Consider an array ar. How to set in ar[3] the number 4. Please two registers : R1 -for the base address of ar -, and R2 .