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Problem 3 The 74F138D is a 3:8 active-low decoder with three enable pins. Assume the enable pins are set to allow the operation of the decoder (G1 =1, ~G2A = ~G2B = 0). In the input word CBA, C is the most significant bit and A is the least significant bit. Design a circuit using this decoder and a single logic gate with as many inputs as you want that realizes the function in the truth table below. Show where the inputs W, X, and Y are wired, and draw the connections from the decoder outputs to the gate. Note, the "Y_" designations inside the decoder symbol correspond to the indices of the outputs. The numbers above the pin connections are pin numbers. Hint: One way of approaching this is to use our method of saying, "I want the output to be [HI/LO] when [any/all] of the inputs are [HI/LO]," and then changing the gate to the DeMorgan equivalent if convenient.

Problem 3 The 74F138D is a 3:8 active-low decoder with three enable pins. Assume the enable pins are set to allow the operation of the decoder (G1 =1, ~G2A = ~G2B = 0). In the input word CBA, C is the most significant bit and A is the least significant bit. Design a circuit using this decoder and a single logic gate with as many inputs as you want that realizes the function in the truth table below. Show where the inputs W, X, and Y are wired, and draw the connections from the decoder outputs to the gate. Note, the "Y_" designations inside the decoder symbol correspond to the indices of the outputs. The numbers above the pin connections are pin numbers. Hint: One way of approaching this is to use our method of saying, "I want the output to be [HI/LO] when [any/all] of the inputs are [HI/LO]," and then changing the gate to the DeMorgan equivalent if convenient.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Problem 3 The 74F138D is a 3:8 active-low decoder with three enable pins. Assume the enable pins are set to allow the operation of the decoder (G1 =1, ~G2A = ~G2B = 0). In the input word CBA, C is the most significant bit and A is the least significant bit. Design a circuit using this decoder and a single logic gate with as many inputs as you want that realizes the function in the truth table below. Show where the inputs W, X, and Y are wired, and draw the connections from the decoder outputs to the gate. Note, the "Y_" designations inside the decoder symbol correspond to the indices of the outputs. The numbers above the pin connections are pin numbers. Hint: One way of approaching this is to use our method of saying, "I want the output to be [HI/LO] when [any/all] of the inputs are [HI/LO]," and then changing the gate to the DeMorgan equivalent if convenient. X Y Z 0 0 0 0 1 1 1 0 1 01 1 0 0 0 0 1 0 1 0 0 1 1 1 W 0 0 0 1 1 1 1 O HNM 1 2 3 Tii 5 ABC G1 ~G2A ~G2B YO Y1 Y2 Y3 Y4 Y5 Y6 Y7 74F138D 15 14 13
Transcribed Image Text:Problem 3 The 74F138D is a 3:8 active-low decoder with three enable pins. Assume the enable pins are set to allow the operation of the decoder (G1 =1, ~G2A = ~G2B = 0). In the input word CBA, C is the most significant bit and A is the least significant bit. Design a circuit using this decoder and a single logic gate with as many inputs as you want that realizes the function in the truth table below. Show where the inputs W, X, and Y are wired, and draw the connections from the decoder outputs to the gate. Note, the "Y_" designations inside the decoder symbol correspond to the indices of the outputs. The numbers above the pin connections are pin numbers. Hint: One way of approaching this is to use our method of saying, "I want the output to be [HI/LO] when [any/all] of the inputs are [HI/LO]," and then changing the gate to the DeMorgan equivalent if convenient. X Y Z 0 0 0 0 1 1 1 0 1 01 1 0 0 0 0 1 0 1 0 0 1 1 1 W 0 0 0 1 1 1 1 O HNM 1 2 3 Tii 5 ABC G1 ~G2A ~G2B YO Y1 Y2 Y3 Y4 Y5 Y6 Y7 74F138D 15 14 13
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