Let us assume that now the CPU send the following virtual addresses. (Please update TLB and Page table if needed.) a) 2227 TLB Page table Physical Address Valid Valid Dirty Ref Tag Physical Page Number or Disk 0 1 5 1 0 0 11 8 1 1 1 3 6 1 1 1 7 1 0 1 4 9 10 11 123456789DE 1 7 0 Disk 1 6 1 9 1 11 0 Disk 1 4 0 Disk 0 Disk 1 3 1 8 b) 13916 followed by c) 34586 (Initial TLB and Page table status comes from what happen in (a)) Problem 2 Virtual memory uses a page table to keep track of the mapping of virtual address to physical address. In this example, assume 4KiB pages, a 4-entry fully associative TLB and a LRU (least recently used) replacement algorithm. The status of the TLB and Page table are shown below TLB Page table Valid Dirty Ref Tag Physical Page Number Valid Physical Address or Disk 1 0 0 11 12 0 1 5 1 1 1 3 6 1 0 Disk 1 0 0 5 11 2 0 Disk 1 0 1 4 9 3 1 6 4567 1 9 1 11 0 Disk 7 1 4 891 0 Disk 0 Disk 10 1 3 11 1 12 Example. Let us assume that the CPU sends the following virtual 4669. We need to figure out the virtual page number. Since we are using decimal numbers, it is necessary to perform arithmetic operations virtual page number = |virtual address page size 14669 4096 1 This page is NOT in TLB (we check the tags). We check in entry 1 of the page table, this is a not valid entry (0); this page is NOT in main memory, TLB miss. Thus, we have a page fault. We need to include the page in page table and TLB. Page table TLB Valid Dirty Ref Tag Physical Page Number Physical Address Valid or Disk 1 0 0 11 8 0 1 5 1 1 1 3 6 1 1 7 1 0 1 1 7 2 0 Disk 1 0 1 4 9 Since TLB is fully associative we can place the new entry in any place. In addition there is a not valid entry that can be used. The physical page is provided by the OS. We can use an address that is not in use; such as 1, 2, 7, ....;let us use 7 10 11 34567 891 1 6 1 9 1 11 0 Disk 1 4 0 Disk 0 Disk 1 3 1 8
Let us assume that now the CPU send the following virtual addresses. (Please update TLB and Page table if needed.) a) 2227 TLB Page table Physical Address Valid Valid Dirty Ref Tag Physical Page Number or Disk 0 1 5 1 0 0 11 8 1 1 1 3 6 1 1 1 7 1 0 1 4 9 10 11 123456789DE 1 7 0 Disk 1 6 1 9 1 11 0 Disk 1 4 0 Disk 0 Disk 1 3 1 8 b) 13916 followed by c) 34586 (Initial TLB and Page table status comes from what happen in (a)) Problem 2 Virtual memory uses a page table to keep track of the mapping of virtual address to physical address. In this example, assume 4KiB pages, a 4-entry fully associative TLB and a LRU (least recently used) replacement algorithm. The status of the TLB and Page table are shown below TLB Page table Valid Dirty Ref Tag Physical Page Number Valid Physical Address or Disk 1 0 0 11 12 0 1 5 1 1 1 3 6 1 0 Disk 1 0 0 5 11 2 0 Disk 1 0 1 4 9 3 1 6 4567 1 9 1 11 0 Disk 7 1 4 891 0 Disk 0 Disk 10 1 3 11 1 12 Example. Let us assume that the CPU sends the following virtual 4669. We need to figure out the virtual page number. Since we are using decimal numbers, it is necessary to perform arithmetic operations virtual page number = |virtual address page size 14669 4096 1 This page is NOT in TLB (we check the tags). We check in entry 1 of the page table, this is a not valid entry (0); this page is NOT in main memory, TLB miss. Thus, we have a page fault. We need to include the page in page table and TLB. Page table TLB Valid Dirty Ref Tag Physical Page Number Physical Address Valid or Disk 1 0 0 11 8 0 1 5 1 1 1 3 6 1 1 7 1 0 1 1 7 2 0 Disk 1 0 1 4 9 Since TLB is fully associative we can place the new entry in any place. In addition there is a not valid entry that can be used. The physical page is provided by the OS. We can use an address that is not in use; such as 1, 2, 7, ....;let us use 7 10 11 34567 891 1 6 1 9 1 11 0 Disk 1 4 0 Disk 0 Disk 1 3 1 8
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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