Orthogonality arises when the design of an instruction set provides a "backup" instruction for each instruction that performs the same function. Please indicate whether or not it is accurate.
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- MUL & DIV instruction in Assembly Language Table 1 EAX EBX ECX EDX 10H 20H 2H 0H Refer to Table 1 above for the following tasks.Write your own code in Visual Studio 2019 to execute the instruction, then fill in the blanks with the correct value of the registers. Also, note the changes. **Note: Always start with the initial value of the registers given in Table 1 above for each question (a-f) This means you have to execute only one instruction per debugging session e.g. execute MUL BX and then debug and get the values of the registers and then stop. Then start again with MUL CX. Answer all questions in 32bit format XXXX XXXX e.g. 0000 1000 with only one white space in between a. MUL BX EAX EBX ECX EDX Answer Answer Answer Answer b. MUL CX EAX EBX ECX EDX c. MUL AX EAX EBX ECX EDX d. DIV BX EAX EBX ECX EDX e. DIV CX EAX EBX ECX EDX f. DIV AX…Find out the Object code for each line of instructions. (SIC/XE) The address needs hexadecimal. Line 30 and 35 pleaseObjective Learn the basic structure of an assembly program, Data Memory Map how to read the 8-bit instruction setreference and Address Offset Data become familiar with a few commands. Ob00001000 1 Ob10010011 Ob00000101 2 Lab 3 4 Task 1: Walk through the assembly program below and fill out the data memory map (right). If a value changes during the program, you only need to 7 record the final value. Unless otherwise stated all 8. memory locations contain a value of 0. 10 11 12 :Program for task 1 :Definitions 13 14 .EQU myData=0x21 .DEF config=R4 15 Ob10100101 Ob10111001 16 17 :Main 18 .CSEG 19 .ORG Ox0000 20 LDI R16, Ob00001000 MOV RO, R16 21 22 LDI R16, Ob10010011 MOV R1, R16 23 24 LDI R16, Ob01010101 ANDI R16,Ob00001111 25 26 MOV R2, R16 ORI R16, Ob10100101 LDI R17,20 ADD R17, R16 27 28 29 MOV R3, R16 30 MOV config, R17 OUT O, R3 31 32 CBI 0,1 IN R5,0 STS myData, RO SBI 1, 6 SBI 1,7 LDS R6, myData 33 1. 34 2 35 3 36 4 37 5 38 6.
- In simple words, describe the final data pointer register.Remaining Time: 28 minutes, 56 seconds. Question Completion Status: A Moving to the next question prevents changes to this answer. uestion 31 What will be the value in the destination register after each of the following instructions executes in sequence, given that CL, DX, and AL are initialized to 3, 1001111010111100b, and 01010111b respectively? Shr dx, 1 Shr dx, cl Rol dx, cl Ror al, 1 al = Moving to the next question prevents changes to this answer. $ OSelect the statements that directly apply to the operation of the RET instruction. transfers control to return address located at the top of the stack places return address on the stack return is made to the instruction that follows the CALL instruction
- What function does the ALU perform when instruction "slt" executes? add magnitude compare set if less than subtractMIPS Simulator QtSpim: You are to have a complete program in MIPS assembly language that behaves exactly as the included C program. This program contains four functions in addition to the main() one. Your solution must contain all five C routines as they have been coded in the example. Make sure to run the program in MIPS and show the same output on MIPS as well to make sure there are no errors. Below is the five C routines and attached is the image of what the output must print out on QtSpim. #include <stdio.h> int getMax(int arr[], int n){int mx = arr[0];for (int i = 1; i < n; i++)if (arr[i] > mx)mx = arr[i];return mx;}void countSort(int arr[], int n, int exp){int output[n];int i, count[10] = { 0 };for (i = 0; i < n; i++)count[(arr[i] / exp) % 10]++;for (i = 1; i < 10; i++)count[i] += count[i - 1];for (i = n - 1; i >= 0; i--) {output[count[(arr[i] / exp) % 10] - 1] = arr[i];count[(arr[i] / exp) % 10]--;}for (i = 0; i < n; i++)arr[i] = output[i];}void…To cut a specific part of the drawing, use the instruction Delete O Trim O Erase O Fillet O To draw a straight line, use the instruction Rectangle Limits Line O Fillet O
- One of the special pointers is not like the others. The pointer is made up of call-saved registers, meaning extra precautions must be taken when using it.8- The memory unit of a computer has 2.00E+20 words. The computer has instruction format with four fields; 3- An operation code field, a mode field to specify one of 4 addressing modes, a register address field to specify one of 65 processor registers, and a memory address. i- ii- Specify the number of bits in each field if the instruction occupies one memory word of 32 bits. Opcode Mode Register AR Specify the size of the memory word and the number of bits in each field if the available number of opcodes is increased to 32. word Opcode Mode Register AR iii- Find the size of the new memory in K Bytes (1K=1024 Bytes) Memory size in K Bytes Memory size in K BytesADD [R1], R2, [R3]; Here [R1] and [R3] indicate memory locations pointed by R1 and R3 register respectively. Here the operand field next to opcode will hold the result at the end. Assume that the machine code of this instruction is loaded at address 1020H of the main memory. Also assume that the contents of registers R1, R2 and R3 are 2001H, 2002H and 2003H respectively. Moreover, 1000H, 2000H and 3000H are saved at memory addresses 2001H, 2002H and 2003H respectively. a) Draw a schematic diagram of a CPU, show its important functional units required to process this instruction.