OBJECTIVE: gain knowledge of sequential The objective of this experimen crouts. You will use tip flops to design up and down counters and will also design a control crout to get the desired sequence of counting. You will become familiar with 555 timer and use it to generate pulses DESIGN REQUIREMENTS: a Design a clock pulse generator using 555 timer as shown b. Using fipfops, design i bit binary down counter. Verify the counting sequence by connecting LED's to the outputs Modify the above crout to get a 4-bit binary up-counter, Verify the counting sequence by using LED's connected to the outputs d. Using the above binary up counter, design a counter with a sequence: 0 1, 2, 3, 4, 5 by adding an additional control crcut. Verty the counting sequence by using LED's connected to the outputs may connect the decoder and deplay, which you have designed in experiment (optional) In addition Out and 155 pn number NOTE: See data for a amplify SURSA DASE SPOMEN 415 (7490) and wring quence

Electric Motor Control
10th Edition
ISBN:9781133702818
Author:Herman
Publisher:Herman
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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create the schematic needed for part b and c please

OBJECTIVE:
The objective of this experiment is to gain knowledge of sequential
circuits. You will use fip-flops to design up and down counters and will also
design a control crout to get the desired sequence of counting. You will
become familiar with 555 timer and use it to generate pulses
DESIGN REQUIREMENTS:
a. Design a clock pulse generator using 555 timer as shown.
b. Using JKp-flops, design a 4 bit binary down counter. Verify the
counting sequence by connecting LED's to the outputs.
c. Modify the above circult to get a 4-bit binary up-counter. Verify the
counting sequence by using LED's connected to the outputs
d. Using the above binary up counter, design a counter with a sequence: 0,
1, 2, 3, 4, 5 by adding an additional control circuit. Verity the counting
sequence by using LED'S connected to the outputs
e. (optional) You may connect the decoder and display, which you have
designed in experimenta 3. too verify your outputs
f. (optional) In addition, you may get an IC counter (eq 7490) and
Implement the circuit a, b, and cusing this IC. Further, you can connect the
decoder to the counter and display it as indicated in paragraph e
NOTE: See data for actual 555 pin numbering. Here in numbering
rearranged to simplify schematic drawing so pin a's are not in sequence.
CLOCK PIASE GENERASSA
everyt
Saur
445
COLA
Transcribed Image Text:OBJECTIVE: The objective of this experiment is to gain knowledge of sequential circuits. You will use fip-flops to design up and down counters and will also design a control crout to get the desired sequence of counting. You will become familiar with 555 timer and use it to generate pulses DESIGN REQUIREMENTS: a. Design a clock pulse generator using 555 timer as shown. b. Using JKp-flops, design a 4 bit binary down counter. Verify the counting sequence by connecting LED's to the outputs. c. Modify the above circult to get a 4-bit binary up-counter. Verify the counting sequence by using LED's connected to the outputs d. Using the above binary up counter, design a counter with a sequence: 0, 1, 2, 3, 4, 5 by adding an additional control circuit. Verity the counting sequence by using LED'S connected to the outputs e. (optional) You may connect the decoder and display, which you have designed in experimenta 3. too verify your outputs f. (optional) In addition, you may get an IC counter (eq 7490) and Implement the circuit a, b, and cusing this IC. Further, you can connect the decoder to the counter and display it as indicated in paragraph e NOTE: See data for actual 555 pin numbering. Here in numbering rearranged to simplify schematic drawing so pin a's are not in sequence. CLOCK PIASE GENERASSA everyt Saur 445 COLA
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