OBJECTIVE: The objective of this experiment is to gain knowledge of sequential outs. You will use fip-flops to design up and down counters and will also design a contralorout to get the desired sequence of counting. You will become familiar with 555 timer and use it to generate pulses DESIGN REQUIREMENTS: & Design a clock pulse generator using 555 timer as shown b. Using fip-flops, design a 4bit binary down counter. Verify the counting sequence by connecting LED's to the outputs Modify the above crout to get a 4-bit binary up-counter. Verify the counting sequence by using LED's connected to the outputs 4. Using the above binary so counter, design a counter with 1, 2, 3, 4, 5 by adding an additional control crut. Verty the counting sequence by using LED'S connected to the outputs (optional) You may connect t t (open) implement the ora veppe Mer NOTE: See data for and wing unter and disp (7490) and Further,

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why is the 555 timer needed for parts b,c,d

OBJECTIVE:
The objective of this experiment is to gain knowledge of sequential
circuits. You will use fip-flops to design up and down counters and will also
design a control crout to get the desired sequence of counting. You will
become familiar with 555 timer and use it to generate pulses.
DESIGN REQUIREMENTS:
a. Design a clock pulse generator using 555 timer as shown.
b. Using 3 fip-flops, design a 4 bit binary down counter. Verify the
counting sequence by connecting LED's to the outputs.
c. Modify the above circult to get a 4-bit binary up-counter. Verify the
counting sequence by using LED's connected to the outputs
d. Using the above binary up counter, design a counter with a sequence: 0,
1, 2, 3, 4, 5 by adding an additional control circuit. Verity the counting
sequence by using LED'S connected to the outputs
e. (optional) You may connect the decoder and display, which you have
designed in experimenta 3. too verify your outputs
f. (optional) In addition, you may get an IC counter (eg 7490) and
Implement the circuit a, b, and cusing this IC. Further, you can connect the
decoder to the counter and display it as indicated in paragraph e
NOTE: See data for actual 555 pin numbering. Here in numbering
rearranged to simplify schematic drawing so pin a's are not in sequence.
CLOCK PIASE GENERASSA
everyt
Saur
445
COLA
Transcribed Image Text:OBJECTIVE: The objective of this experiment is to gain knowledge of sequential circuits. You will use fip-flops to design up and down counters and will also design a control crout to get the desired sequence of counting. You will become familiar with 555 timer and use it to generate pulses. DESIGN REQUIREMENTS: a. Design a clock pulse generator using 555 timer as shown. b. Using 3 fip-flops, design a 4 bit binary down counter. Verify the counting sequence by connecting LED's to the outputs. c. Modify the above circult to get a 4-bit binary up-counter. Verify the counting sequence by using LED's connected to the outputs d. Using the above binary up counter, design a counter with a sequence: 0, 1, 2, 3, 4, 5 by adding an additional control circuit. Verity the counting sequence by using LED'S connected to the outputs e. (optional) You may connect the decoder and display, which you have designed in experimenta 3. too verify your outputs f. (optional) In addition, you may get an IC counter (eg 7490) and Implement the circuit a, b, and cusing this IC. Further, you can connect the decoder to the counter and display it as indicated in paragraph e NOTE: See data for actual 555 pin numbering. Here in numbering rearranged to simplify schematic drawing so pin a's are not in sequence. CLOCK PIASE GENERASSA everyt Saur 445 COLA
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