Match each CPU register with the correct desciption. Contains a word to be stored/receive in memory or sent to А. the I/O uni V Memory buffer register (MBR) Contains flag bits denoting the result of the last operation v Processor Status Word (PSW) В. performed. vInstruction register (IR) C. Contains the 8-bit opcode instruction being executed v Program counter (PC) Contains the address of the next instruction pair to be fetched D. from memory Accumulator (A) Employed to temporarily hold operands and results of ALU E. operations
Match each CPU register with the correct desciption. Contains a word to be stored/receive in memory or sent to А. the I/O uni V Memory buffer register (MBR) Contains flag bits denoting the result of the last operation v Processor Status Word (PSW) В. performed. vInstruction register (IR) C. Contains the 8-bit opcode instruction being executed v Program counter (PC) Contains the address of the next instruction pair to be fetched D. from memory Accumulator (A) Employed to temporarily hold operands and results of ALU E. operations
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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