Load Data En [2:0] LD RST Q[2:0] Contador síncrónico de 3 bits RST LD EN 1 X X 0 0 0 1 0 0 X 1 0 Q+ Q+ <= 0 Q+<= LoadData[2:0] Q+ <= Q + 1; Q+ <= Q;

Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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A Richard sequencer is a state machine that uses a loaded counter, like the one shown in the figure, instead of Flip Flops to store its state. This works in such a way that when you want to jump sequentially from one state to another, enable (En) is used. On the other hand, when the transition is non-sequential, the Parallel Load (LD) input is used. And finally, when you want to stay in the same state, both terminals must be disabled. To implement the next state logic, a Richard sequencer makes use of three multiplexers: one to control the enable terminal, another to govern the load terminal, and a last to perform parallel loading of the data. Implement the following state diagram using only a loaded counter, like the one shown in the figure, three multiplexers and logic gates of type Not in such a way that the described structure of a Richard sequencer is respected. The behavior of the counter is shown in the following table.

Load
[2:0]
Q[2:0]
Data
En
RST
LD
En
Q+
Contador
1
X
Q+ <= 0
síncrónico de 3 bits
1
X
Q* <= LoadData[2:0]
LD
1
Q* <= Q + 1;
RST
Q* <= Q;
Transcribed Image Text:Load [2:0] Q[2:0] Data En RST LD En Q+ Contador 1 X Q+ <= 0 síncrónico de 3 bits 1 X Q* <= LoadData[2:0] LD 1 Q* <= Q + 1; RST Q* <= Q;
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