It should be clear that disk striping can improve data transfer rate when the strip siz is small compared to the I/O request size. It should also be clear that RAID 0 pro vides improved performance relative to a single large disk, because multiple I/O re quests can be handled in parallel. However, in this latter case, is disk striping necessary? That is, does disk striping improve I/O request rate performance com- pared to a comparable disk array without striping?

It should be clear that disk striping can improve data transfer rate when the strip siz is small compared to the I/O request size. It should also be clear that RAID 0 pro vides improved performance relative to a single large disk, because multiple I/O re quests can be handled in parallel. However, in this latter case, is disk striping necessary? That is, does disk striping improve I/O request rate performance com- pared to a comparable disk array without striping?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Consider a disk with the following characteristics: block size 512 bytes, number of blocks per track=20, number of tracks per surface=400. A disk pack consists of 15 double sided disks. Suppose the disk drive rotates the disk pack at an average speed of 2400 rpm (revolutions per minute) i) How much time in (msec) does one disk revolution take? ii) Using the total capacity of the track as 10240 bytes how many bytes will be transferred from the track in 1 msec (ie transfer rate in bytes/sec)
1. What is the difference (or differences) between a TLB and on-chip cache? a. The TLB is direct-mapped, while caches are set associative. b. The TLB is indexed by the virtual address, while caches are Indexed by the physical address. c. The TLB stores virtual-to-physical address translations, while caches store data. d. The TLB can be slow, but caches need to be fast. e. The TLB stores instructions, while caches store data. 2. Say we have two mutexes, implemented with binary semaphores, and two threads which access them. Which of the following can cause deadlock a. The threads lock the mutexes in the same order. b. The threads lock the mutexes in a different order. C. The threads unlock the mutexes in the same order. d. The threads unlock the mutexes in a different order.
Suppose that a magnetic disk has an average seek time of 4 ms, a rotation rate of 5400 RPM, a transfer rate of 50 MB/second, a sector size of 512 bytes, and controller overhead of 2 ms. What is the average amount of time to read a single sector?
Below is a series of byte addresses in a system with 32 bit words. Assuming a direct-mapped cache with 4-word blocks and a total size of 32 words that is initially empty, (a) label each reference in the list as a hit or a miss and (b) show the entire history of the cache, including tag and data. Byte Address Byte Address (Hexadecimal) (Binary) Hit/Miss 76 0000 0000 0111 0110 1E3 0000 0001 1110 0011 815 0000 1000 0001 0101 141 0000 0001 0100 0001 170 0000 0001 0111 0000 5E1 0000 0101 1110 0001 320 0000 0011 0010 1100 B10 0000 1011 0001 0000 175 0000 0001 0111 0101 583 0000 0101 1000 0011 1FF 0000 0001 1111 1111 7A 0000 0000 0111 1010 2B2 0000 0010 1011 0010 5E4 0000 0101 1110 0100 816 0000 1000 0001 0110 438 0000 0100 0011 1000
A file system with 300 GByte uses a file descriptor with 8 direct block address. 1 indirect block address and 1 doubly indirect block address. The size of each disk block is 128 Bytes and the size of each disk block address is 8 Bytes. Find the maximum possible file size in this file system.
A computer uses virtual memory, and a new solid-state drive (SSD) as space for paging. Refer to the last ppt file. In the case presented there, the hard disk drive (HDD) required 25 ms to read in a page, and a rate of 1 page fault per 1000 references introduced a 250 slowdown. If the SSD offers a time of only 80 µs, what is the slowdown in performance caused by 1 pf per 1000 references (you are not concerned with dirty vs. clean pages). What is the maximum rate of page faults you can accept if you want no more than a 5% slowdown in execution using virtual memory? Know your metric prefixes and symbols for time: s for seconds, ms for milliseconds, µs for microseconds, ns for nanoseconds.
Consider a demand-paging system with a paging disk that has an average access/transfer time of 50 ms. Addresses are translated through a page table in main memory, with an access time of 500 ns per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added a TLB that reduces access time to one memory reference if the page-table entry is in the TLB. Assume that 80% of the accesses are in the TLB and that, of those remaining, 15% (or 3% of the total) cause page faults. We assume that the TLB access time is 20 ns. What is the effective access time?
It is given that on a system, on average, an instruction executes in 1 nano second. Suppose that it takes 20 micro seconds of processor time for page fault. While, it takes 300 micro seconds of disk time for reading and writing a single page. Suppose that on average 1/3 of the pages that need to be paged out are modified. What is the average number of instructions between page faults that would cause the disk to be busy doing page transfers all the time?