If the latency of the datapath components is as follows; memories: 400ps each, the register file 200ps, ALU 200ps, adders 50 ps. What is the clock cycle time assuming the same ISA you studied in chapter 4. Ignore all other latencies. DO NOT ENTER THE UNIT (PS). Add Add ALU result Shift left 2 RegDst Branch MemRead

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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If the latency of the datapath components is as follows; memories: 400ps each, the register
file 200ps, ALU 200ps, adders 50 ps. What is the clock cycle time assuming the same ISA you
studied in chapter 4. Ignore all other latencies. DO NOT ENTER THE UNIT (PS).
Add
ALU
Addresult
Shift
left 2
RegDst
Branch
MemRead
MemtoReg
ALUOP
MemWnie
ALUSrc
RegWrite
Instruction (31-26]
Control
Instruction (25-21]
Read
address
Read
register 1
PC
Jinstruction (20-16)
Read
data 1
Read
register 2
Zero
nstruction
(31-01
Instruction instruction [15-11
memory
ALU ALU
Read
Write
Read
result
Address
data
register data 2
Write
data Registers
Write Data
data memory
Instruction [15-0]
Sign- 32
extend
16
ALU
control
A
Instruction (5-0)
Transcribed Image Text:If the latency of the datapath components is as follows; memories: 400ps each, the register file 200ps, ALU 200ps, adders 50 ps. What is the clock cycle time assuming the same ISA you studied in chapter 4. Ignore all other latencies. DO NOT ENTER THE UNIT (PS). Add ALU Addresult Shift left 2 RegDst Branch MemRead MemtoReg ALUOP MemWnie ALUSrc RegWrite Instruction (31-26] Control Instruction (25-21] Read address Read register 1 PC Jinstruction (20-16) Read data 1 Read register 2 Zero nstruction (31-01 Instruction instruction [15-11 memory ALU ALU Read Write Read result Address data register data 2 Write data Registers Write Data data memory Instruction [15-0] Sign- 32 extend 16 ALU control A Instruction (5-0)
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