Given the Verilog skeleton code given in the example document for this quiz. Replace and with the code below and determine y_tb and z_tb at the time stated. Note that the ^ symbol means XOR. y = a ^ -b; z = a| c; a_tb = 1; b_tb = 1; c_tb= 0; #10 a_tb = 0; #20 b_tb = 0; Find y_tb and z_tb at time 50. O a. y_tb = 0, z_tb = 0 O b.y_tb = 0, z_tb = 1 O c. y_tb = 1, z_tb = 0 O d. y_tb = 1, z_tb = 1

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Given the Verilog skeleton code given in the example document for this quiz. Replace <logic in device unter test>
and <test vector sequence> with the code below and determine y_tb and z_tb at the time stated. Note that the ^
symbol means XOR.
<logic in device unter test>
y = a ^ -b;
z = a | c;
<test vector sequence>
a_tb = 1;
b_tb = 1;
c_tb= 0;
#10 a_tb = 0;
#20 b_tb = 0;
Find y_tb and z_tb at time 50.
O a. y_tb = 0, z_tb = 0
O b.y_tb = 0, z_tb = 1
O C. y_tb = 1, z_tb = 0
d. y_tb = 1, z_tb = 1
Transcribed Image Text:Given the Verilog skeleton code given in the example document for this quiz. Replace <logic in device unter test> and <test vector sequence> with the code below and determine y_tb and z_tb at the time stated. Note that the ^ symbol means XOR. <logic in device unter test> y = a ^ -b; z = a | c; <test vector sequence> a_tb = 1; b_tb = 1; c_tb= 0; #10 a_tb = 0; #20 b_tb = 0; Find y_tb and z_tb at time 50. O a. y_tb = 0, z_tb = 0 O b.y_tb = 0, z_tb = 1 O C. y_tb = 1, z_tb = 0 d. y_tb = 1, z_tb = 1
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