Fix the bug, there seem to be an infinit loop, possiblely in L3 fib:        addi    sp,sp,-32        sw      ra,28(sp)        sw      s0,24(sp)        sw      s1,20(sp)        addi    s0,sp,32        sw      a0,-20(s0)        lw      a4,-20(s0)        li      a5,1        bgt     a4,a5,.L2        lw      a5,-20(s0)        j       .L3.L2:        lw      a5,-20(s0)        addi    a5,a5,-1        mv      a0,a5        call    fib        mv      s1,a0        lw      a5,-20(s0)        addi    a5,a5,-2        mv      a0,a5        call    fib        mv      a5,a0        add     a5,s1,a5.L3:        mv      a0,a5        lw      ra,28(sp)        lw      s0,24(sp)        lw      s1,20(sp)        addi    sp,sp,32        jr      ramain:        addi    sp,sp,-32        sw      ra,28(sp)        sw      s0,24(sp)        addi    s0,sp,32        li      a5,4        sw      a5,-20(s0)        lw      a0,-20(s0)        call    fib        mv      a5,a0        sw      a5,-24(s0)        li      a5,0        mv      a0,a5        lw      ra,28(sp)        lw      s0,24(sp)        addi    sp,sp,32        jr      ra

Q: Fix the bug, there seem to be an infinit loop, possiblely in L3 fib:        addi    sp,sp,-32…

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Race Condition

A race condition occurs within a critical section when two or more tasks try to access and alter a shared resource simultaneously. As a consequence, the process changes to a state of inconsistency.