Figure Q3 shows the memory mapped I/O of a LPC1768 microcontroller. It shows that the microcontroller uses the same address space to address both memory and I/O devices. The memory and registers of the I/O devices are mapped to (associate with) address values. O4010 0000 APB1 peripherals LPC178 memory space OFFFF FFFF O400F Co00 31 O400C 0000 system control 30-16 reerved reserved OE010 0000 AHB peripherals O5020 0000 QEI O400B CO00 O00B 8000 1Mmotor control PWM O4008 4000 13 O400B 0000 repettive intemupt timer D40DA COD0 1 O400A 8000 O400A 4000 D O400A 0000 private peripheral bua 127-4 reserved OHECOO 0000 USB controller reserved reserved O5000 CO0 reserved O5020 0000 O5000 8000 reserved AHB periheras O5000 0000 GPDMA controler 10 O5000 4000 reserved Ethemet controller reserved ou4400 0000 Ds000 co0 peripheral bit band alias addressing O4200 0000 UARTS O4009 Co00 reserved FOu4010 0000 O4008 0000 UART2 O009 8000 O009 4000 5 O4009 0000 4 O4008 Co00 APBO peripherals 31-24 reserved APB1 peripherals D4008 0000 Timer 3 APB0 peripherale O4006 0000 O4005 CO00 O4004 CO00 O4004 8000 O4004 4000 O4004 0000 O4003 CO00 Timer 2 1 GB O4000 0000 23 reserved DAC a2400 0000 22 - 19 reserved SSPO AHB SRAM b band alas addressing 1-0 reserved O2200 0000 18 CANO O4008 0000 reserved 17 CANI GPIO 16 CAN common a2009 Co00 a2008 4000 a2007 Co00 FONTFFF 2000 OxIFFF 0000 OuT000 8000 15 CAN AF registers reserved 14 CAN AF RAM O4003 8000 O4003 4000 O4003 0000 05 08 AHB SRAM (2 bocks of 16 kB) 13 ADC reserved 12 SSPI 8 KB boot ROM pin connect O4002 CO00 O4002 8000 RTC backup regislers o402 4000 11 10 GPIO Intemupts reserved 32 KB local static RAM Hcode/Dcode ax1000 0000 SPI O4002 0000 memory space 17 O4001 CO00 O4001 B000 O4001 4000 reserved 16 PWMI O0000 0400 256 words reserved OH0008 0000 15 O0000 0000 active internupt veciors UART1 512 kB on-chip flash Jo:0000 0000 O4001 0000 UARTO O4000 CO00 12 TIMERI O4000 8000 TIMERO O4000 4000 D4000 0000 WOT

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Question

1)By referring to the memory map, identify the start and end addresses of the generalpurpose input/output (GPIO) and the Analog-to-Digital (ADC) registers.

2)For an LPC1768 microcontroller, write a sequence of assembly instruction to set the
byte 2 of port 1 as input, while the byte 3 of port 1 as output

3)

Figure Q3 shows the memory mapped I/O of a LPC1768 microcontroller. It shows that the
microcontroller uses the same address space to address both memory and I/O devices. The
memory and registers of the I/O devices are mapped to (associate with) address values.
APB1 peripherals
system control
30 - 16 reserved
Ox4010 0000
LPC1768 memory space
4 GB
O40OF CO00 31
70FFFF FFFF
reserved
Ow400C 0000
OxE010 0000
AHB peripherals
Os020 0000
D40OB Co0o 15E
O4006 8000
QEI
private peripheral bus
127-4 reserved
14 motor cotrol PWM
OxEC00 0000
USB controller
O400B 4000 13:
O400B 000012 repetitive intemupt timer
D400A COD0 1
Oe400A 8000 10
O400A 4000 DE
reserved
reserved
O5000 CO00
Ox5020 0000
reserved
OS000 8000
reserved
AHB periherale
O:5000 0000
GPOMA controller
12s
O5000 4000
reserved
reserved
Ethemet controller
0:4400 0000
peripheral bit band alias addressng O4200 0000
OS000 0000
12C2
Ox400A 0000
O4009 Co00 7
O4009 8000E
5
UART3
reserved
UART2
Ox4010 0000
APB1 peripherals
APBO peripherals
Timer 3
Os4008 0000
D4008 0000
O4009 4000
O4009 00004
O4008 Co00 3
O4008 8000 2
31 -24 reserved
APB0 peripherale
Ox4006 0000
Timer 2
1 GB
Ox4000 0000
23
12C1
Os4005 CO00
reserved
DAC
0x2400 0000
22- 19 reserved
Ox4004 CO00
SSPO
AHB SRAM bit band alas addressing
Ox2200 0000
18
CAN2
Ox4004 6000
1-0 reserved
O4008 0000
reserved
17
CAN1
O4004 4000
GPIO
16
CAN common
Ox4004 0000
Ox2009 C000
15
CAN AF registers
Ox4003 CO00
reserved
T0:2008 4000
CAN AF RAM
Ox4003 B000
14
OS GB
AHB SRAM (2 bocks of 16 kB)
02007 COO
13
ADC
O4003 4000
reserved
SSP1
TOx1FFF 2000
12
Ox4003 0000
8 KB boot ROM
Ox1FFF 0000
11
pin connect
Ox4002 CO00
GPIO intemupts
Ox4002 8000
RTC+ backup registers o402 4000
10
reserved
Dx1000 8000
32 kB local static RAM
-code/D-code
Ox1000 0000
SPI
O4002 0000
memory space
17
12Co
Ox4001 CO00
Ox4001 8000
reserved
PWM1
0000 0400
256 wo
reserved
Ox4001 4000
Ox0008 0000
lOx0000 0000
O0000 0000 active interrupt vectors
UARTI
512 kB on-chip flash
O4001 0000
Ox4000 CO00
Ox4000 8000
Oe4000 4000
O4000 0000
14
O GB
UARTO
3
TIMERI
12
1
TIMERO
10
WOT
Figure Q3
Transcribed Image Text:Figure Q3 shows the memory mapped I/O of a LPC1768 microcontroller. It shows that the microcontroller uses the same address space to address both memory and I/O devices. The memory and registers of the I/O devices are mapped to (associate with) address values. APB1 peripherals system control 30 - 16 reserved Ox4010 0000 LPC1768 memory space 4 GB O40OF CO00 31 70FFFF FFFF reserved Ow400C 0000 OxE010 0000 AHB peripherals Os020 0000 D40OB Co0o 15E O4006 8000 QEI private peripheral bus 127-4 reserved 14 motor cotrol PWM OxEC00 0000 USB controller O400B 4000 13: O400B 000012 repetitive intemupt timer D400A COD0 1 Oe400A 8000 10 O400A 4000 DE reserved reserved O5000 CO00 Ox5020 0000 reserved OS000 8000 reserved AHB periherale O:5000 0000 GPOMA controller 12s O5000 4000 reserved reserved Ethemet controller 0:4400 0000 peripheral bit band alias addressng O4200 0000 OS000 0000 12C2 Ox400A 0000 O4009 Co00 7 O4009 8000E 5 UART3 reserved UART2 Ox4010 0000 APB1 peripherals APBO peripherals Timer 3 Os4008 0000 D4008 0000 O4009 4000 O4009 00004 O4008 Co00 3 O4008 8000 2 31 -24 reserved APB0 peripherale Ox4006 0000 Timer 2 1 GB Ox4000 0000 23 12C1 Os4005 CO00 reserved DAC 0x2400 0000 22- 19 reserved Ox4004 CO00 SSPO AHB SRAM bit band alas addressing Ox2200 0000 18 CAN2 Ox4004 6000 1-0 reserved O4008 0000 reserved 17 CAN1 O4004 4000 GPIO 16 CAN common Ox4004 0000 Ox2009 C000 15 CAN AF registers Ox4003 CO00 reserved T0:2008 4000 CAN AF RAM Ox4003 B000 14 OS GB AHB SRAM (2 bocks of 16 kB) 02007 COO 13 ADC O4003 4000 reserved SSP1 TOx1FFF 2000 12 Ox4003 0000 8 KB boot ROM Ox1FFF 0000 11 pin connect Ox4002 CO00 GPIO intemupts Ox4002 8000 RTC+ backup registers o402 4000 10 reserved Dx1000 8000 32 kB local static RAM -code/D-code Ox1000 0000 SPI O4002 0000 memory space 17 12Co Ox4001 CO00 Ox4001 8000 reserved PWM1 0000 0400 256 wo reserved Ox4001 4000 Ox0008 0000 lOx0000 0000 O0000 0000 active interrupt vectors UARTI 512 kB on-chip flash O4001 0000 Ox4000 CO00 Ox4000 8000 Oe4000 4000 O4000 0000 14 O GB UARTO 3 TIMERI 12 1 TIMERO 10 WOT Figure Q3
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