empty page is available or the replaced page is not modified, and 20 percent of the time. What is the maximum acceptable page fault rat milliseconds if the replaced page is modified. Memory access time is 100 nanoseconds. Assume that the page to be replaced is modified 7 in registers. It takes 8 milliseconds to service a page fault if an Que 4.30. Consider a demand paged system. Page tables are held on effective access time of not more than 200 nanoseconds ?

empty page is available or the replaced page is not modified, and 20 percent of the time. What is the maximum acceptable page fault rat milliseconds if the replaced page is modified. Memory access time is 100 nanoseconds. Assume that the page to be replaced is modified 7 in registers. It takes 8 milliseconds to service a page fault if an Que 4.30. Consider a demand paged system. Page tables are held on effective access time of not more than 200 nanoseconds ?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Consider a swapping system in which memory consists of the following hole sizes in memory order: 10 MB, 4 MB, 20 MB, 18 MB, 7 MB, 9 MB, 12 MB and 15 MB. Which hole is taken for successive segment requests of (i) 12 MB (ii) 10 MB (iii) 9 MB for first fit? Now repeat the question for best fit and worse fit.
Suppose that a computer has a processor with two L1 caches, one for instructions and one for data, and an L2 cache. Let τ be the access time for the two L1 caches. Themiss penalties are approximately 15τ for transferring a block from L2 to L1, and 100τ fortransferring a block from the main memory to L2. For the purpose of this problem, assumethat the hit rates are the same for instructions and data and that the hit rates in the L1 andL2 caches are 0.96 and 0.80, respectively.(a) What fraction of accesses miss in both the L1 and L2 caches, thus requiring accessto the main memory?(b) What is the average access time as seen by the processor?(c) Consider the following change to the memory hierarchy. The L2 cache is removedand the size of the L1 caches is increased so that their miss rate is cut in half. Whatis the average memory access time as seen by the processor in this case
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Assume we have a demand-paged memory. The page table is held in registers. It takes 9 milliseconds to service a page fault if an empty page is available or the replaced page is not modified, and 22 milliseconds if the replaced page is modified. Memory access time is 100 nanoseconds. Assume that the page to be replaced is modified 80 percent of the time. What is the maximum acceptable page-fault rate for an effective access time of no more than 250 nanoseconds?
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