Determine the currents IR, ID1, D2, and voltage Voin a digital logic gate for the following input conditions: 1. V₁=V/₂=0 V 2. V₁=5 V, V₂=0 3. Vi=V₂=5 V
Determine the currents IR, ID1, D2, and voltage Voin a digital logic gate for the following input conditions: 1. V₁=V/₂=0 V 2. V₁=5 V, V₂=0 3. Vi=V₂=5 V
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Question
![NMOS
Nonsaturation region (ups < ups (sat))
iD = K[2(UGS - VTN)UDS - VDS]
Saturation region (Ups > Ups(sat))
ip = K₁(VGS - VTN)²
Transition point
VDs (sat) = UGS - VTN
Enhancement mode
VTN >0
Depletion mode
VTN<0
K.=+H.C. (H)=+*: (7)
K₂
k
T =
1-1-²-2) -
di D
3) L = [2K (Vasq - VIN)²]*¹ = [2]¹
ON DS
1-poin
i Dar = K₂ (VGs - VIN) ² (1+2VDS)
V₂N =V₂NO+Y(√20, +V'S = √20₁)
= 2K (Vas -VTN) = 2√ √K₂1DQ
ic = IseVBE/VT
¡E = ¹ = ³/VT
iB ==
/Vr
For both transistors
ig=ic + ig
ig = (1+B)iB
α = 1
Bipolar Junction Transistor (BJT)
Summary of the bipolar current-voltage relationships in the active region
NPN
PNP
ic Is exp
, exp (* * *)(1+² =)
V₁B
la
PMOS
Nonsaturation region (USD < Usp (sat))
iD = Kp[2(USG + VTP) USD - USD]
Saturation region (VSD > USD (sat))
ip = K₂(USG + VTP)²
Transition point
VSD (sat) = USG + VTP
Enhancement mode
VTP < 0
Depletion mode
VTP > 0
K‚= ‡μ‚C« (H) = + *; (H)
la
ic=
¡E = ¹ =
iB = 1 =
Iseva/VT
¹/V₂
²¹/V₂
ic = BiB
ic = αig = (+)ie
ß = 12
ro
10](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F18a59f0a-7c8f-49a1-8487-9703585f340d%2F907d9c87-7cf7-47b1-8219-bf87b8bf18f9%2Fp0o2tjg_processed.png&w=3840&q=75)
Transcribed Image Text:NMOS
Nonsaturation region (ups < ups (sat))
iD = K[2(UGS - VTN)UDS - VDS]
Saturation region (Ups > Ups(sat))
ip = K₁(VGS - VTN)²
Transition point
VDs (sat) = UGS - VTN
Enhancement mode
VTN >0
Depletion mode
VTN<0
K.=+H.C. (H)=+*: (7)
K₂
k
T =
1-1-²-2) -
di D
3) L = [2K (Vasq - VIN)²]*¹ = [2]¹
ON DS
1-poin
i Dar = K₂ (VGs - VIN) ² (1+2VDS)
V₂N =V₂NO+Y(√20, +V'S = √20₁)
= 2K (Vas -VTN) = 2√ √K₂1DQ
ic = IseVBE/VT
¡E = ¹ = ³/VT
iB ==
/Vr
For both transistors
ig=ic + ig
ig = (1+B)iB
α = 1
Bipolar Junction Transistor (BJT)
Summary of the bipolar current-voltage relationships in the active region
NPN
PNP
ic Is exp
, exp (* * *)(1+² =)
V₁B
la
PMOS
Nonsaturation region (USD < Usp (sat))
iD = Kp[2(USG + VTP) USD - USD]
Saturation region (VSD > USD (sat))
ip = K₂(USG + VTP)²
Transition point
VSD (sat) = USG + VTP
Enhancement mode
VTP < 0
Depletion mode
VTP > 0
K‚= ‡μ‚C« (H) = + *; (H)
la
ic=
¡E = ¹ =
iB = 1 =
Iseva/VT
¹/V₂
²¹/V₂
ic = BiB
ic = αig = (+)ie
ß = 12
ro
10
![In the circuit in Figure B1 with circuit and transistor parameters Rp = 20kn, K₂ =
0.1 mA/V2, VTN = 0.8 V, and λ = 0.
2. V₁=5 V, V₂=0
3. V₁ V2=5 V
- Eg
n₁ = BT ³/22kgT
J₁ = eD₂
al
Drift and Diffusion Currents
J=oE=(1/p)E
Vbi =
Determine the currents IR, ID1, D2, and voltage Vo in a digital logic gate for the following input
conditions:
1. V₁ V₂ = 0 V
Physical Constants & Semiconductor Properties
q=1.602 x 10-19 C
= 8.854 x 10-¹2 F/m
kB = 1.380 x 10-23 J/K
me = 9.109 x 10³1 kg
1 μm = 1 x 10 m
&-Si=11.7
V₁_N₁
-=
N₂
dn
dx
Vs
p-n Junction and Diode Circuits
- KT (NAND)
e
M₁
10 = 1 [exp (1987)-1]
ID
VDD=5 V
IDI
Eg-Si= 1.1 eV
Eg-GaAs = 1.4 eV
Eg-Ge=0.66 eV
nsi =
nsi = 1.45 x 10¹0
1.45 x
1 nm 1 x 10⁹ m
photocurrent:
MOS Capacitor and MOSFETS
C=244
d
V₂
Figure B1
Formula Sheet
2 fRC
Rp
&x= (3.9) × (8.854 x 10-¹2) F/m
n² = n. p
10¹⁰ cm-³
cm3
V=V₁ In
source regulation and load regulation:
M₂
o = enfle + epμh
dp
Jp =-eDp
dx
wheref=
Bsi = 5.23 x 10¹5 cm-³K-3/2
BGaAs = 2.10 x 10¹4 cm³ K-3/2
BGe 1.66 x 10¹5 cm³ K-3/2
μe-si = 1400 cm² V-¹ s-¹
=
= V₁ In (NAND) G
2
1 pm = 1 x 10-¹2 m
102
1
2Tp
C = Eax A
tax
Vo
AVL X100%
AVPS
Iph = neDA
D Dp KT
=
H₂
Hp 9
C₂0
ID
D = 1 [EXP ( 1 ) - ₁]
1+
VR
μh-St=450 cm² V-1 S-1
1 fm = 1 x 10-15 m
Thermal Voltage V₁ = 0.026 V
Cut-in Voltage V₂ = 0.7 V
VL, no load VL, full lood
VL, full load
-x 100%
tax](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F18a59f0a-7c8f-49a1-8487-9703585f340d%2F907d9c87-7cf7-47b1-8219-bf87b8bf18f9%2F70am32r_processed.png&w=3840&q=75)
Transcribed Image Text:In the circuit in Figure B1 with circuit and transistor parameters Rp = 20kn, K₂ =
0.1 mA/V2, VTN = 0.8 V, and λ = 0.
2. V₁=5 V, V₂=0
3. V₁ V2=5 V
- Eg
n₁ = BT ³/22kgT
J₁ = eD₂
al
Drift and Diffusion Currents
J=oE=(1/p)E
Vbi =
Determine the currents IR, ID1, D2, and voltage Vo in a digital logic gate for the following input
conditions:
1. V₁ V₂ = 0 V
Physical Constants & Semiconductor Properties
q=1.602 x 10-19 C
= 8.854 x 10-¹2 F/m
kB = 1.380 x 10-23 J/K
me = 9.109 x 10³1 kg
1 μm = 1 x 10 m
&-Si=11.7
V₁_N₁
-=
N₂
dn
dx
Vs
p-n Junction and Diode Circuits
- KT (NAND)
e
M₁
10 = 1 [exp (1987)-1]
ID
VDD=5 V
IDI
Eg-Si= 1.1 eV
Eg-GaAs = 1.4 eV
Eg-Ge=0.66 eV
nsi =
nsi = 1.45 x 10¹0
1.45 x
1 nm 1 x 10⁹ m
photocurrent:
MOS Capacitor and MOSFETS
C=244
d
V₂
Figure B1
Formula Sheet
2 fRC
Rp
&x= (3.9) × (8.854 x 10-¹2) F/m
n² = n. p
10¹⁰ cm-³
cm3
V=V₁ In
source regulation and load regulation:
M₂
o = enfle + epμh
dp
Jp =-eDp
dx
wheref=
Bsi = 5.23 x 10¹5 cm-³K-3/2
BGaAs = 2.10 x 10¹4 cm³ K-3/2
BGe 1.66 x 10¹5 cm³ K-3/2
μe-si = 1400 cm² V-¹ s-¹
=
= V₁ In (NAND) G
2
1 pm = 1 x 10-¹2 m
102
1
2Tp
C = Eax A
tax
Vo
AVL X100%
AVPS
Iph = neDA
D Dp KT
=
H₂
Hp 9
C₂0
ID
D = 1 [EXP ( 1 ) - ₁]
1+
VR
μh-St=450 cm² V-1 S-1
1 fm = 1 x 10-15 m
Thermal Voltage V₁ = 0.026 V
Cut-in Voltage V₂ = 0.7 V
VL, no load VL, full lood
VL, full load
-x 100%
tax
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