Design a voltage-divider bias circuit in Figure 1 with a gain of 5. Assume the following values: R;= 12R2 and 5000 S R$< 2k. 9 18 V Rp Ipss=6 mA Vp =-3 V Ros = 10 µS Cs Figure 1

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Design a voltage-divider bias circuit in Figure 1 with a gain of 5. Assume the
following values: R;= 12R2 and 5000 s R$s 2kn.
18 V
Rp
C2
R1
HE
Ipss = 6 mA
Vp =-3 V
Bos = 10 µS
Z,
Cs
R2
R5
Figure 1
Transcribed Image Text:Design a voltage-divider bias circuit in Figure 1 with a gain of 5. Assume the following values: R;= 12R2 and 5000 s R$s 2kn. 18 V Rp C2 R1 HE Ipss = 6 mA Vp =-3 V Bos = 10 µS Z, Cs R2 R5 Figure 1
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