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Design a finite state machine capable of serially adding and subtracting two binary numbers. In addition to a system clock, the system should have four inputs, A, B, S, and R where A and B are the operands, S is the operation selector (Add if S = 0, Subtract if S = 1), and R is a "reset" signal which will return the system to its initial state. The system should have four outputs, F, Z, N, and V, where F which is the serialized result of the operation, Z, which is 1 if the overall result is 0, N, which is 1 if the overall result is negative, and V, which is 1 if the overall result contains an overflow. The system should not be able to switch between addition or subtraction mid-operation.

Design a finite state machine capable of serially adding and subtracting two binary numbers. In addition to a system clock, the system should have four inputs, A, B, S, and R where A and B are the operands, S is the operation selector (Add if S = 0, Subtract if S = 1), and R is a "reset" signal which will return the system to its initial state. The system should have four outputs, F, Z, N, and V, where F which is the serialized result of the operation, Z, which is 1 if the overall result is 0, N, which is 1 if the overall result is negative, and V, which is 1 if the overall result contains an overflow. The system should not be able to switch between addition or subtraction mid-operation.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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I need to write a adder and subtractor code for this github

https://tinyurl.com/verilogHDcode

 

Design a finite state machine capable of serially adding and subtracting two binary numbers. In addition to a system clock, the system should have four inputs, A, B, S, and R where A and B are the operands, S is the operation selector (Add if S = 0, Subtract if S = 1), and R is a "reset" signal which will return the system to its initial state. The system should have four outputs, F, Z, N, and V, where F which is the serialized result of the operation, Z, which is 1 if the overall result is O, N, which is 1 if the overall result is negative, and V, which is 1 if the overall result contains an overflow. The system should not be able to switch between addition or subtraction mid-operation.
Transcribed Image Text:Design a finite state machine capable of serially adding and subtracting two binary numbers. In addition to a system clock, the system should have four inputs, A, B, S, and R where A and B are the operands, S is the operation selector (Add if S = 0, Subtract if S = 1), and R is a "reset" signal which will return the system to its initial state. The system should have four outputs, F, Z, N, and V, where F which is the serialized result of the operation, Z, which is 1 if the overall result is O, N, which is 1 if the overall result is negative, and V, which is 1 if the overall result contains an overflow. The system should not be able to switch between addition or subtraction mid-operation.
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