Describe the differences between PROM and EEPROM memory products and state the type of applications for which each is best suited, including the underlying physical reasons why each product is best suited to a particular task. Q7 (a) (b) Figure Q7 shows a design for a 16x1bit SRAM module. i) Explain why this is a poor design and sketch the structure of a more practical design for this RAM module. ii) How many gates are saved in the decoder circuitry by your enhanced design, and how many gates would be saved if the module were a 1Mx1bit SRAM? iii) What are the disadvantages of your design approach? A IMx4bit DRAM module (of optimal internal design) requires each cell to be refreshed every 64 ms. Refresh for one row takes 60 ns. What fraction of the operating time of the device is lost in refreshing the memory cells? (c) Datain IN OUT SEL g WR АЗ A2 A1 IN OUTH SEL d WR A0 - IN OUTH SEL WR IN OUTH SEL d WR RW CS Dataout Figure Q7

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