Consider the unpipelined machine with 10 nano seconds clock cycles. It uses four

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Consider the unpipelined machine with
10 nano seconds clock cycles. It uses four
cycles for ALU operations and branches
whereas five cycles for memory operation.
Assume that the relative frequencies of these
operations
are
40%, 20% and
40%
respectively. Suppose that due to clock skew
and setup, pipelining the machine adds
1 nano seconds overhead to the clock. How
much speed up in the instruction execution
rate will we gain from a pipeline?
Transcribed Image Text:Consider the unpipelined machine with 10 nano seconds clock cycles. It uses four cycles for ALU operations and branches whereas five cycles for memory operation. Assume that the relative frequencies of these operations are 40%, 20% and 40% respectively. Suppose that due to clock skew and setup, pipelining the machine adds 1 nano seconds overhead to the clock. How much speed up in the instruction execution rate will we gain from a pipeline?
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