Consider the S-Box, what's the outputs of the following inputs 0 1 2 4 S 6 7 10 11 12 13 14 15 0 14 04 13 01 02 15 11 08 03 10 06 12 05 09 00 07 1 00 15 07 04 14 02 13 10 03 06 12 11 60 05 03 08 2 04 01 14 08 13 06 02 15 12 09 07 03 10 05 00 3 15 12 08 02 04 09 01 07 05 11 03 14 10 00 06 13 a) 100001 b) 101011
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- The circuit below is an 8-bit shifter. If the input i7i6i5i4i3i2i1i0 = 11010010, what is the output when sh=1? i7 16 i5 14 i3 i2 il i0 sh q7 9b q5 q4 q3 q2 ql q0 00110100 01001011 01101001 11010010Using Matlab, create the following.Calculate the Boolean expression for each set of inputs A, B, C A B C A && (B || C) 01100111 00000000 00000000 11110000 00000000 01100111 00000000 01100111 00000000 11110000 01100111 00000000
- 000I1001 (y) 53. Add the following BCD numbers: (a) 1000 + 0110 (b) 0111 + 0101 (c) 1001 + 1000 (e) 00100101 + 00100111 (g) 10011000 + 10010111 (d) 1001 + 0111 (f) 01010001 + 01011000 (h) 010101100001 + 011100001000 54. Convert cach pair of decimal numbers to BCD, and add as indicated: (a) 4 - 3 (b) 5 + 2 (d) 17 + 12 ie) 28 - 23 (f) 65 + 58 (g) 113 + 101 (h) 295 – 157Build a circuit that takes four bits as input: W, X, Y, Z. Treat WX as a 2-bit unsigned binary number, and treat YZ as a second 2-bit unsigned binary number. Your circuit should generate the output corresponding to the product of WX and YZ. You will need 4 bits of output for this problem.For example, if your input was 1011, your inputs correspond to 2 and 3. That product is 6, so your output will be 0110.Create a truth table for this problem, show all k-maps and minimizations, and build the corresponding (minimized) circuit. Use XOR, XNOR, NAND, and NOR as appropriate if it reduces the number of gates used.For the input/output table, give a Boolean expression that is a sum of minterms and is equivalent to the function defined by the table.
- Q2. Two integer numbers A and B are represented in pure binary by two bits, being A=a₁a0 and B=b₁bo. A logic circuit provides the 4 bits output C=C3C2C1C0, as shown in the truth table below. FO a₁ 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 ao og 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 b₁ 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 bo 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 C3 0 0 0 C2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 1 1 C1 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 b) Write the expression as Min Term form with Σ for C₁. Co 1 1 1 1 0 OO 0 0 0 1 1 1 1 0 ooo 0 0 0A digital combinational circuit has 4 inputs ABCD that represents a 4 bit binary number,(A is the most significant bit). The output of the circuit will be 1 if the input number is a multiple of 4. If the circuit is implemented using 4X1 multiplexer, then which of the given designs is correct. What is required is to select the correct image from these images, or if all of the images are incorrect, design a correct oneChose the correct answer for the output F and G of the following circuit ( Assume that A= 10101010, B= 11101110, C=00100010 and D =10010011 and the first bit out from the circuit is bit 0) A F C A F= 01000110, G=11010111 F= 00000010, G=11010111 None of them O F= 01000110, G=01010111 F= 00000010, G=01010111
- In DES, if the input to the below S-Box was 101010, then the output will be: S₁0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 14 04 13 01 02 15 11 08 03 10 06 12 05 09 00 07 00 15 07 04 14 02 13 01 10 06 12 11 09 05 03 08 04 01 14 08 13 06 02 11 15 12 09 07 03 10 05 00 3 15 12 08 02 04 09 01 07 05 11 03 14 10 00 06 13 1 2 Select one: a.0110 b.0010 C.0011 d.1101Q2. Two integer numbers A and B are represented in pure binary by two bits, being A=a₁a0 and B=b₁bo. A logic circuit provides the 4 bits output C=C3C2C1C0, as shown in the truth table below. a) a₁ 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 ao 0 OO 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 b₁ 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 og bo 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 C3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 C2 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 1 C1 Co 1 1 1 1 1 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 OO 0 0 0 1 1 1 1 0 0 0 0 Write the product of sums expression for co and sum of products expression for C₁Add the following BCD numbers:(a) 1000 + 0110 (b) 0111 + 0101(c) 1001 + 1000 (d) 1001 + 0111(e) 00100101 + 00100111 (f) 01010001 + 01011000(g) 10011000 + 10010111 (h) 010101100001 + 011100001000