Change this MIPS code to RISC-V Assembly using sll. Please add comments. Allow running in RARS.
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Change this MIPS code to RISC-V Assembly using sll.
Please add comments. Allow running in RARS.
![. text
.globl main
main:
$t0, myData
$t1, 0 ($t0)
$t2, 4 ($t0)
add $t3, $t1, $t2
$t3, 8 ($t0)
sll $t4, $t3, 1
$t5, 8 ($t0)
la
lw
lw
Sw
lw
li
$v0, 10
syscall
.data
myData:.word 100, 200](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fb9a4ce2c-63dc-493b-bfcd-4c33f9866a97%2F1c412b26-b764-4e3c-9312-6ad809030ee6%2F7kl0baw_processed.jpeg&w=3840&q=75)
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