Case Study Assume a computer system has a main memory of 256 Bytes. The following is a memory byte-access trace history of a program run on this system. For example, as it is shown, the program first accesses memory address 0000 0000, and then it accesses memory address 0000 0001 and so on. Note the memory addresses are represented in binary: 00000000, 00000001, 00000010, 00000011, 00001000, 00010000, 00010001, 00000100, 00000101, 00000110, 00000111, 00001001, 00001010, 00001011, 00001100, 00001000, 00001001, 00001010, 00011100, 00011101. Q3. Assume the system has a 16-Byte direct mapped unified L1 cache with a block size of 2 Bytes. The following table shows how the cache looks like after the first access to the memory is finished. Please show; in the provided table, how it looks like after the 20th access is finished. You could ignore the "Data" Column. (Add or re remove Rows/Columns in the provided table for your answer, as you see fit). Cache contents after the 1st access: Cache Index 000 001 010 Tag 0000 Valid Bit 1 0 0 Data

Case Study Assume a computer system has a main memory of 256 Bytes. The following is a memory byte-access trace history of a program run on this system. For example, as it is shown, the program first accesses memory address 0000 0000, and then it accesses memory address 0000 0001 and so on. Note the memory addresses are represented in binary: 00000000, 00000001, 00000010, 00000011, 00001000, 00010000, 00010001, 00000100, 00000101, 00000110, 00000111, 00001001, 00001010, 00001011, 00001100, 00001000, 00001001, 00001010, 00011100, 00011101. Q3. Assume the system has a 16-Byte direct mapped unified L1 cache with a block size of 2 Bytes. The following table shows how the cache looks like after the first access to the memory is finished. Please show; in the provided table, how it looks like after the 20th access is finished. You could ignore the "Data" Column. (Add or re remove Rows/Columns in the provided table for your answer, as you see fit). Cache contents after the 1st access: Cache Index 000 001 010 Tag 0000 Valid Bit 1 0 0 Data

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Question

**Case Study**

Assume a computer system has a main memory of 256 Bytes. The following is a memory byte-access trace history of a program run on this system. For example, as it is shown, the program first accesses memory address 0000 0000, and then it accesses memory address 0000 0001 and so on. Note the memory addresses are represented in binary:

00000000, 00000001, 00000010, 00000011, 00001000, 00010000, 00010001, 00000100, 00001001, 00001010, 00000011, 00001001, 00001010, 00001011, 00001100, 00001000, 00001001, 00001010, 00011100, 00011101.

**Q3.** Assume the system has a 16-Byte direct mapped unified L1 cache with a block size of 2 Bytes. The following table shows how the cache looks like after the first access to the memory is finished. Please show, in the provided table, how it looks like after the 20th access is finished. You could ignore the “Data” Column. (Add or remove Rows/Columns in the provided table for your answer, as you see fit).

**Cache contents after the 1st access:**

| Cache Index | Tag | Valid Bit | Data |
|-------------|------|-----------|------|
| 000 | 0000 | 1 | |
| 001 | | 0 | |
| 010 | | 0 | |
| 011 | | 0 | |
| 100 | | 0 | |
| 101 | | 0 | |
| 110 | | 0 | |
| 111 | | 0 | |

**Cache contents after the 20th access:**

| Cache Index | Tag | Valid Bit | Data |
|-------------|-----|-----------|------|
| 000 | | | |
| 001 | | | |
| 010 | | | |
| 011 | | | |
| 100 | | |

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