(c) The following code fragment is used to illustrate the occurrence of output dependency and antidependency in the issue of instructions to achieve instruction level parallelism in a superscalar processor. Explain these occurrences of output dependency and antidependency with reference to the code fragment in Fig Q2(c): Il: R5 E R4 + R5 12: R6 E R5 OR R2 13: R5 € R5 – R3 14: R8 € R5 EXOR R6 Fig Q2(c) Code Fragment

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