A microprocessor has an increment memory direct instruction, which adds 1 to the value in memory location. The instruction has five stages: fetch opcode (four bus clock cycles); fetch operand address (three bus clock cyles); fetch operand (three bus clock cyles); add 1 to operand (three bus clock cyles); and, store operand (three bus clock cyles). By what amount (in percent) will the duration of the instruction increase if we have to insert two bus wait states in each memory read and memory write operation? Repeat assuming that the increment operation takes 13 cycles instead of 3 cycles.
A microprocessor has an increment memory direct instruction, which adds 1 to the value in memory location. The instruction has five stages: fetch opcode (four bus clock cycles); fetch operand address (three bus clock cyles); fetch operand (three bus clock cyles); add 1 to operand (three bus clock cyles); and, store operand (three bus clock cyles). By what amount (in percent) will the duration of the instruction increase if we have to insert two bus wait states in each memory read and memory write operation? Repeat assuming that the increment operation takes 13 cycles instead of 3 cycles.
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ISBN:9780133923605
Author:Robert L. Boylestad
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A microprocessor has an increment memory direct instruction, which adds 1 to the value in memory location. The instruction has five stages: fetch opcode (four bus clock cycles); fetch operand address (three bus clock cyles); fetch operand (three bus clock cyles); add 1 to operand (three bus clock cyles); and, store operand (three bus clock cyles).
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- By what amount (in percent) will the duration of the instruction increase if we have to insert two bus wait states in each memory read and memory write operation?
- Repeat assuming that the increment operation takes 13 cycles instead of 3 cycles.
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