A computer has a level 1 cache with an access time of 2 cycles and an average hit rate of 90% and DRAM access time is 50 cycles. a. What is the average memory access time for this computer? Ans: cycles (Give answer with two precision format, e.g. 1.23) b. If the system is upgraded with a level 2 cache with a hit ratio of 85% and an access time of 12 cycles. What is the new average memory access time for this computer? Ans: cycles (Give answer with two precision format, e.g. 1.23) Note: Addition of L2 cache has no impact on access time for DRAM.

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Note: This is referring to ARM architecture.

A computer has a level 1 cache with an access time of 2 cycles and an average hit rate of 90%, and DRAM access time is 50 cycles.

a. What is the average memory access time for this computer?

**Ans:** [      ] cycles  
(Give answer with two precision format, e.g., 1.23)

b. If the system is upgraded with a level 2 cache with a hit ratio of 85% and an access time of 12 cycles, what is the new average memory access time for this computer?

**Ans:** [      ] cycles  
(Give answer with two precision format, e.g., 1.23)

**Note:** Addition of L2 cache has no impact on access time for DRAM.
Transcribed Image Text:A computer has a level 1 cache with an access time of 2 cycles and an average hit rate of 90%, and DRAM access time is 50 cycles. a. What is the average memory access time for this computer? **Ans:** [ ] cycles (Give answer with two precision format, e.g., 1.23) b. If the system is upgraded with a level 2 cache with a hit ratio of 85% and an access time of 12 cycles, what is the new average memory access time for this computer? **Ans:** [ ] cycles (Give answer with two precision format, e.g., 1.23) **Note:** Addition of L2 cache has no impact on access time for DRAM.
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