4.4 Emitter-Bias Configuration 8. For the emitter-stabilized bias circuit of Fig. 4.122, determine: a. b. Ico V CEO d. Vc- e. Vg. f. Vg. c.

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240 DC BIASING-BJTS
20 V
470 2
270 k2
Ve
VCEQ
B= 125
C9
2,2 k2
FIG. 4.122
Transcribed Image Text:240 DC BIASING-BJTS 20 V 470 2 270 k2 Ve VCEQ B= 125 C9 2,2 k2 FIG. 4.122
4.4 Emitter-Bias Configuration
8. For the emitter-stabilized bias circuit of Fig. 4.122, determine:
a.
b. Ice
c. VCEQ
d. Vc-
e. Vg-
f. VE.
D10n J63
Transcribed Image Text:4.4 Emitter-Bias Configuration 8. For the emitter-stabilized bias circuit of Fig. 4.122, determine: a. b. Ice c. VCEQ d. Vc- e. Vg- f. VE. D10n J63
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