4. FIGURE 1 shows how a 3 to 8 line decoder (TTL 74138) can be used in conjunction with NAND gate (TTL 74133) to connect a set of switches to the data bus of a microprocessor system via buffers (TTL 74367). Answer the following questions relating to the diagram: a) What address, in HEX, is required on the address bus in order toread the switches? b) RD and MEMRQare control lines from the CPU. What must their logic state be in order to read the switches? Data bus 74 367 74 133 74 138 A15 D7 DO EN EN Address bus RD MEMRQ A4 A1 AO EN TRUTH TABLE CBAO 1 2 3 4 5 6 7 0 0 00 1111 1 11 0 0 11 01 1 1 1 1 1 0 1 01 10 1 1 1 1 1 0 1 11 1 10 1 1 1 1 10 01 1 1 1 0 1 1 1 10 11 1 1 1 1 0 11 101 1 1 1 1 101 1 11 1 1 1 1 1 1 0 74 367 (part of) Data enable Data outputs 1234 6 6 Input switches

4. FIGURE 1 shows how a 3 to 8 line decoder (TTL 74138) can be used in conjunction with NAND gate (TTL 74133) to connect a set of switches to the data bus of a microprocessor system via buffers (TTL 74367). Answer the following questions relating to the diagram: a) What address, in HEX, is required on the address bus in order toread the switches? b) RD and MEMRQare control lines from the CPU. What must their logic state be in order to read the switches? Data bus 74 367 74 133 74 138 A15 D7 DO EN EN Address bus RD MEMRQ A4 A1 AO EN TRUTH TABLE CBAO 1 2 3 4 5 6 7 0 0 00 1111 1 11 0 0 11 01 1 1 1 1 1 0 1 01 10 1 1 1 1 1 0 1 11 1 10 1 1 1 1 10 01 1 1 1 0 1 1 1 10 11 1 1 1 1 0 11 101 1 1 1 1 101 1 11 1 1 1 1 1 1 0 74 367 (part of) Data enable Data outputs 1234 6 6 Input switches

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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