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4. 4-to-1-Line Multiplexer Design: a. Condensed truth table of a 4-to-1-Line Multiplexer is given as: S, So | OUT 0 0 0 1 12 1 1 1 0 b. Write the output as a function of selection lines (S1, S0) and inputs (10, 11, 12, 13) c. Draw the logic diagram of the above multiplexer. d. Implement the logic circuit to realize your design in c.

4. 4-to-1-Line Multiplexer Design: a. Condensed truth table of a 4-to-1-Line Multiplexer is given as: S, So | OUT 0 0 0 1 12 1 1 1 0 b. Write the output as a function of selection lines (S1, S0) and inputs (10, 11, 12, 13) c. Draw the logic diagram of the above multiplexer. d. Implement the logic circuit to realize your design in c.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Hello ,

I will send this experiment to bartebly 4 times. Because there are 4 questions.

Can you please solve the 4th question?

It's been wrong many times before. I will be glad if it is solved carefully.

 

Decoders and Multiplexers IC Pin configurations LEARNING OBJECTIVE: 2-Input AND Gate - 740SLS Inverter (NOT Gate) - 7404LS Vor Vcc o To understand the 14 13 12 operation of Decoders and Multiplexers COMPONENTS REQUIRED: 2-Input NAND Gate - 74001S 2-Input OR Gate - 74321S Vcc Voc Breadboard 14 13 12 O O 9 O Trainer Kit (for voltage (5V and 品 ground) connections) o Connecting Wires IC 7408 (AND), IC 7432 (OR), IC 7404 (NOT), IC 7400 (NAND) 2-Input NOR Gate - 7402LS 2-Input EX-OR Gate - 7486LS Vc Vc GND Fig. 1: IC Pin Configurations 1. 2-to-4 Line Decoder Design: a. Write the truth table of a 2-to-4 line decoder b. Draw the logic diagram of the decoder c. Implement the logic circuit using output-AND gates and invertors 2. 2-to-1-Line Multiplexer Design a. Write the Condensed Truth Table of a 2-to-1 line Multiplexer b. Draw the logic diagram of the above multiplexer c. Implement the logic circuit using basic gates and invertors 3. Design a 4:1 MUX using three 2:1 MUXS and realize your design. 4. 4-to-1-Line Multiplexer Design: a. Condensed truth table of a 4-to-1-Line Multiplexer is given as: S, So | OUT 0 0 0 1 12 1 1 1 0 13 b. Write the output as a function of selection lines (S1, S0) and inputs (10, 11, 12, 13) c. Draw the logic diagram of the above multiplexer. d. Implement the logic circuit to realize your design in c.
Transcribed Image Text:Decoders and Multiplexers IC Pin configurations LEARNING OBJECTIVE: 2-Input AND Gate - 740SLS Inverter (NOT Gate) - 7404LS Vor Vcc o To understand the 14 13 12 operation of Decoders and Multiplexers COMPONENTS REQUIRED: 2-Input NAND Gate - 74001S 2-Input OR Gate - 74321S Vcc Voc Breadboard 14 13 12 O O 9 O Trainer Kit (for voltage (5V and 品 ground) connections) o Connecting Wires IC 7408 (AND), IC 7432 (OR), IC 7404 (NOT), IC 7400 (NAND) 2-Input NOR Gate - 7402LS 2-Input EX-OR Gate - 7486LS Vc Vc GND Fig. 1: IC Pin Configurations 1. 2-to-4 Line Decoder Design: a. Write the truth table of a 2-to-4 line decoder b. Draw the logic diagram of the decoder c. Implement the logic circuit using output-AND gates and invertors 2. 2-to-1-Line Multiplexer Design a. Write the Condensed Truth Table of a 2-to-1 line Multiplexer b. Draw the logic diagram of the above multiplexer c. Implement the logic circuit using basic gates and invertors 3. Design a 4:1 MUX using three 2:1 MUXS and realize your design. 4. 4-to-1-Line Multiplexer Design: a. Condensed truth table of a 4-to-1-Line Multiplexer is given as: S, So | OUT 0 0 0 1 12 1 1 1 0 13 b. Write the output as a function of selection lines (S1, S0) and inputs (10, 11, 12, 13) c. Draw the logic diagram of the above multiplexer. d. Implement the logic circuit to realize your design in c.
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