4- The data sheet of a quad two-input NAND gate specifies tne owing parameters: lon (max.) 04 mA, Von (min.) 2.7 V. Vn (min.) 2V, V. (max. 0.8 V, VoL (max.)0.4 V, los. (max.)8 mA, la (max.)-0.4 mA, In (max.) 201A, loCH (max,)1.6 mA, Iee. (max.)44 mA, ta t15 ns and a supply voltage range of 5 V. Determine (a) The average power dissipation of a single NAND gate. (b) The maximum average propagation delay of a single gate, (e) The HIGH-stute noise margin and (d) the LOW-state noise margin
4- The data sheet of a quad two-input NAND gate specifies tne owing parameters: lon (max.) 04 mA, Von (min.) 2.7 V. Vn (min.) 2V, V. (max. 0.8 V, VoL (max.)0.4 V, los. (max.)8 mA, la (max.)-0.4 mA, In (max.) 201A, loCH (max,)1.6 mA, Iee. (max.)44 mA, ta t15 ns and a supply voltage range of 5 V. Determine (a) The average power dissipation of a single NAND gate. (b) The maximum average propagation delay of a single gate, (e) The HIGH-stute noise margin and (d) the LOW-state noise margin
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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
Transcribed Image Text:4. The data sheet of a quad two-input NAND gate specifies the touiwing
parameters: lon (max.)-0.4 mA, Von (min.) =2.7 V. Vn (min.) =2V, Vn.
(max. 0.8 V, VoL (max.) 0.4 V, lot. (max.)8 mA. In (max.)-0.4 mA, Inn
(max.)-201A, lecs (max.)1.6 mA, lce (max.)44 mA, tol ta15 ns
and a supply voltage range of 5 V. Determine
(a) The average power dissipation of a single NAND gate.
(b) The maximum average propagation delay of a single gate,
(e) The HIGH-state noise margin and (d) the LOW-state noise margin
5- Refer to exercise 4. How many NAND gate inputs can be driven from the
output of a NAND gate of this type?
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