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3. Using the small signal model, obtain the voltage gain of the common source with current source load shown below. Take note, Vb is a DC bias. VDD HEM2 oVout Use this as guide CMOS Amplifiers 바 VDD VoD VoHEM2 O9m21ro2 바 Vout oVout VinHM, VinoHE ro1 (a) (b) Figure 7.10 (a) CS stage using a PMOS device as a current source, (b) small-signal model. output impedance [Fig. 7.10(b)] because vj = 0 and hence gm2V1 = 0. Thus, the drain node of M1 sees both roi and ro2 to ac ground. Equations (7.46) and (7.48) give A, = -gm1 (ro||ro2) (7.52) Rout = roi||ro2. (7.53)

3. Using the small signal model, obtain the voltage gain of the common source with current source load shown below. Take note, Vb is a DC bias. VDD HEM2 oVout Use this as guide CMOS Amplifiers 바 VDD VoD VoHEM2 O9m21ro2 바 Vout oVout VinHM, VinoHE ro1 (a) (b) Figure 7.10 (a) CS stage using a PMOS device as a current source, (b) small-signal model. output impedance [Fig. 7.10(b)] because vj = 0 and hence gm2V1 = 0. Thus, the drain node of M1 sees both roi and ro2 to ac ground. Equations (7.46) and (7.48) give A, = -gm1 (ro||ro2) (7.52) Rout = roi||ro2. (7.53)

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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3. Using the small signal model, obtain the voltage gain of the common source with current source load shown below. Take note, Vb is a DC bias. VDD HEM2 Vout Use this as guide CMOS Amplifiers 마 VDD VoD m21'02 Vout Vout VinHEM, Vino- M1 (b) (a) Figure 7.10 (a) CS stage a PMOS device as a current source, (b) small-signal model. output impedance [Fig. 7.10(b)] because vi = 0 and hence gm2V1 = 0. Thus, the drain node of M1 sees both roi and ro2 to ac ground. Equations (7.46) and (7.48) give A, = -gmi (ro1||ro2) (7.52) (7.53) Rout = roi||ro2.
Transcribed Image Text:3. Using the small signal model, obtain the voltage gain of the common source with current source load shown below. Take note, Vb is a DC bias. VDD HEM2 Vout Use this as guide CMOS Amplifiers 마 VDD VoD m21'02 Vout Vout VinHEM, Vino- M1 (b) (a) Figure 7.10 (a) CS stage a PMOS device as a current source, (b) small-signal model. output impedance [Fig. 7.10(b)] because vi = 0 and hence gm2V1 = 0. Thus, the drain node of M1 sees both roi and ro2 to ac ground. Equations (7.46) and (7.48) give A, = -gmi (ro1||ro2) (7.52) (7.53) Rout = roi||ro2.
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