3. (a) Design a clocked synchronous state machine with one input X and two outputs UNLK and HINT. The UNLK output should be 1 if and only if X is 0 and the sequence of inputs received on X at the preceding seven clock ticks was 0110111 (from earliest toward latest). The HINT output should be 1 if and only if the current value of X is the correct one to move the machine closer to being in the "unlocked" state (with UNLK=1). (b) Ignoring HINT output, realize only UNLK output. To realize it as a finite-memory machine, we can use a shift register. For this problem, use 74LS164.

Database System Concepts
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Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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3. (a) Design a clocked synchronous state machine with one input X and two outputs UNLK and HINT. The UNLK output should be 1 if and only if X is 0 and the sequence of inputs received on X at the preceding seven clock ticks was 0110111 (from earliest toward latest). The HINT output should be 1 if and only if the current value of X is the correct one to move the machine closer to being in the “unlocked” state (with UNLK=1).

(b) Ignoring HINT output, realize only UNLK output. To realize it as a finite-memory machine, we can use a shift register. For this problem, use 74LS164.
Transcribed Image Text:3. (a) Design a clocked synchronous state machine with one input X and two outputs UNLK and HINT. The UNLK output should be 1 if and only if X is 0 and the sequence of inputs received on X at the preceding seven clock ticks was 0110111 (from earliest toward latest). The HINT output should be 1 if and only if the current value of X is the correct one to move the machine closer to being in the “unlocked” state (with UNLK=1). (b) Ignoring HINT output, realize only UNLK output. To realize it as a finite-memory machine, we can use a shift register. For this problem, use 74LS164.
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