3- address line are necessary to address two megabytes (2048k) of memory? 4- bits are stored by a 256 X4 memory chip? Can this chip be specified as 128 byte memory? 5- lines must be decoded to generate five chip select signals?

3- address line are necessary to address two megabytes (2048k) of memory? 4- bits are stored by a 256 X4 memory chip? Can this chip be specified as 128 byte memory? 5- lines must be decoded to generate five chip select signals?

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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3- address line are necessary to address two megabytes (2048k) of memory?
4- bits are stored by a 256 X 4 memory chip? Can this chip be specified as 128 byte memory?
5- lines must be decoded to generate five chip select signals?

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