26 Design a BJT differential amplifier that provides two single-ended outputs (at the collectors). The amplifier is to have a differential gain (to each of the two outputs) of at least 100 V/V, a differential input resistance ≥10 kn, and a common-mode gain (to each of the two outputs) no greater than 0.1 V/V. Use a 2-mA current source for biasing. Give the complete circuit with component values and suitable power supplies that allow for ±2 V swing at each collector. Specify the minimum value that the output resistance of the bias current source must have. The BJTs available have B≥ 100. What is the value of the input com- mon-mode resistance when the bias source has the lowest acceptable resistance?

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D'6.26 Design a BJT differential amplifier that provides
two single-ended outputs (at the collectors). The
amplifier is to have a differential gain (to each of
the two outputs) of at least 100 V/V, a differential
input resistance ≥10 kn, and a common-mode
gain (to each of the two outputs) no greater than
0.1 V/V. Use a 2-mA current source for biasing.
Give the complete circuit with component values
and suitable power supplies that allow for ±2 V
swing at each collector. Specify the minimum
value that the output resistance of the bias current
source must have. The BJTs available have
B≥ 100. What is the value of the input com-
mon-mode resistance when the bias source has
the lowest acceptable resistance?
Transcribed Image Text:D'6.26 Design a BJT differential amplifier that provides two single-ended outputs (at the collectors). The amplifier is to have a differential gain (to each of the two outputs) of at least 100 V/V, a differential input resistance ≥10 kn, and a common-mode gain (to each of the two outputs) no greater than 0.1 V/V. Use a 2-mA current source for biasing. Give the complete circuit with component values and suitable power supplies that allow for ±2 V swing at each collector. Specify the minimum value that the output resistance of the bias current source must have. The BJTs available have B≥ 100. What is the value of the input com- mon-mode resistance when the bias source has the lowest acceptable resistance?
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