(18) The figme below shows four switches part of the control circuitry in ave capy macchine, The suwitches ave at Narious points along the puth of the copy paper as paper passes trtough the machine. Each switch is normally open, and as the Daper pueses over a It is impossible for switches sw1 to SW4 to be closed at the seume time. Design the Vogic circuit to produce a HIGH output whenever two or more switches are closed at the same time. Use K-mapping and take advantage of the don'tcare conditions. a the switch, the switch closes.

Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Temp
Sensor
Pressure
warning
Light
RPM
(18) The figume below shows four
bhaut
switches
are part of the control circutry in
woy
Narious points along the path of the apy
machine, The switches are at
the
paper as
Each switch is normally open and as the
Daper peses over a switch, the switch closes.
It is impossble for switches sW 1 to sW4
to be closed at the same time.
Logic circuit to produce a HIGH output whenever
two or more switches ave closed at thhe same
time. Use K-mapping and take advanbage of
the don't care conditions.
paper passes thtough the machine.
Design the
sw!
SW4A Circut
Transcribed Image Text:Temp Sensor Pressure warning Light RPM (18) The figume below shows four bhaut switches are part of the control circutry in woy Narious points along the path of the apy machine, The switches are at the paper as Each switch is normally open and as the Daper peses over a switch, the switch closes. It is impossble for switches sW 1 to sW4 to be closed at the same time. Logic circuit to produce a HIGH output whenever two or more switches ave closed at thhe same time. Use K-mapping and take advanbage of the don't care conditions. paper passes thtough the machine. Design the sw! SW4A Circut
(14) Draw the truth table for ahalf-adder
and implament the half-adder using 2-to-4
decoder.
(20) Minimize the following Logical function
using Ca) K-maps
6) Quine McCluskey method.
(21) An ADc is monturing the DC-vobtage
a 2-V storage battery
anorlbiting
converter's output is a 4-6i7
of
The
spaceship.
binary number, ABCD, comesponding to bthe
baltery voltage i with A as lthe MSB.
converter's outputs are fed to a Logic circuit
that is to poduce
as the binary value is qreater than 0l1o,=6,0"
Design this logic circuit.
The
a HIGH out put as long
(22) Change each gate to a NOR yate.
Transcribed Image Text:(14) Draw the truth table for ahalf-adder and implament the half-adder using 2-to-4 decoder. (20) Minimize the following Logical function using Ca) K-maps 6) Quine McCluskey method. (21) An ADc is monturing the DC-vobtage a 2-V storage battery anorlbiting converter's output is a 4-6i7 of The spaceship. binary number, ABCD, comesponding to bthe baltery voltage i with A as lthe MSB. converter's outputs are fed to a Logic circuit that is to poduce as the binary value is qreater than 0l1o,=6,0" Design this logic circuit. The a HIGH out put as long (22) Change each gate to a NOR yate.
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