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11. Use NAND gates, NOR gates, or combinations of both to implement the following logic expressions as stated: (a) X = AB + CD + (A + B)(ACD + BE) (b) X = ABCD + DEF + AF (c) X = A[B + C(D + E)]

11. Use NAND gates, NOR gates, or combinations of both to implement the following logic expressions as stated: (a) X = AB + CD + (A + B)(ACD + BE) (b) X = ABCD + DEF + AF (c) X = A[B + C(D + E)]

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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Hello,

 

I don't konw how to implement expression for part(b) with NAND and NOR gate.

My method is : (1) Implement these expression with AND and OR gate.

                       (2) Add bubble in front of the AND gate and add bubble behind the OR gate.

Is there anything wrong with my method?

Besides, I am wondering why there is a inverter behind the NAND gate (shown in answer1.PNG)


Thanks.

 

 

E F A (b) X- ABCD+ DEF+ AF
Transcribed Image Text:E F A (b) X- ABCD+ DEF+ AF
11. Use NAND gates, NOR gates, or combinations of both to implement the following logic expressions as stated: (a) X = AB + CD + (A + B)(ACD + BE) (b) X = ABCD + DEF + AF (c) X = A[B + C(D + E)]
Transcribed Image Text:11. Use NAND gates, NOR gates, or combinations of both to implement the following logic expressions as stated: (a) X = AB + CD + (A + B)(ACD + BE) (b) X = ABCD + DEF + AF (c) X = A[B + C(D + E)]
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