Procedure:1.Design the CS circuit shown in Fig. (1) using Vpp=18v,R=470k2, Vp=-2.5v,u =12, f=100Hz and I,=3.5mA, Ipss-5mA and r,=502 (JFET 2N3819).DDA= -gm RL* R*=R//rdsThe DC analysis:In=Ipss(1-VGs/Vp)?GS'(VGs= -0.425v, gm=3.32mS, Rs=121)gm=2IDSS(1-VGS/Vp)/|Vp| , VGS=-ID*RsVps=0.5VDDDSVDD=VDs+ Ip(RD+Rs) --- (Rp=2.4k)H=gm*rds---(rds=3.6k)Cs=1/2nf (Rg//((rds + Rp)/(µ+1))) ---(Cs=16.5µf)C=1/2nf(r; + RG) -----(C=3.38µf)

The self biased circuit is shown below,

1.Design the CS circuit shown in Fig. (1) using Vpp=18v,RG=470k2, Vp=-2.5v, u =12, f=100HZ and I,=3.5mA, IDss=5mA and r;=502 (JFET 2N3819). A= -gm RL* R_²=R//rds The DC analysis: In=Ipss(1-VGs/Vp)² (VGs= -0.425v, gm=3.32mS, Rs=121) gm=2IDSS(1-VGS/Vp)/|Vp| , VGS=-ID*Rs Vps=0.5VDD VDD=VDs+ Ip(Rp+Rg) --- (Rp=2.4k) u=gm*rds ------(rds=3.6k) Cs=1/2af¿(Rs//((rds + Rp)/(µ+1)))---(Cs=16.5µf) C=1/2nf(r; + RG) -----(C=3.38µf)

1.Design the CS circuit shown in Fig. (1) using Vpp=18v,RG=470k2, Vp=-2.5v, u =12, f=100HZ and I,=3.5mA, IDss=5mA and r;=502 (JFET 2N3819). A= -gm RL* R_²=R//rds The DC analysis: In=Ipss(1-VGs/Vp)² (VGs= -0.425v, gm=3.32mS, Rs=121) gm=2IDSS(1-VGS/Vp)/|Vp| , VGS=-IDRs Vps=0.5VDD VDD=VDs+ Ip(Rp+Rg) --- (Rp=2.4k) u=gmrds ------(rds=3.6k) Cs=1/2af¿(Rs//((rds + Rp)/(µ+1)))---(Cs=16.5µf) C=1/2nf(r; + RG) -----(C=3.38µf)

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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