1. Consider a 128-word L2 memory and a 16-word direct mapped L1 cache. (2 points each) a. How many bits wide is the L2 address? b. How many index bits are in the L2 address? c. How many tag bits are in the L2 address? d. How many words from the L2 memory will map to the same word in L1? 2. Consider a 65,536 word L2 memory and a 4,096 word L1 direct mapped cache with block sizes of 512 words. (2 points each) a. How many blocks are in L1?
1. Consider a 128-word L2 memory and a 16-word direct mapped L1 cache. (2 points each) a. How many bits wide is the L2 address? b. How many index bits are in the L2 address? c. How many tag bits are in the L2 address? d. How many words from the L2 memory will map to the same word in L1? 2. Consider a 65,536 word L2 memory and a 4,096 word L1 direct mapped cache with block sizes of 512 words. (2 points each) a. How many blocks are in L1?
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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![1. Consider a 128-word L2 memory and a 16-word direct mapped L1 cache.
(2 points each)
a. How many bits wide is the L2 address?
b. How many index bits are in the L2 address?
c. How many tag bits are in the L2 address?
d. How many words from the L2 memory will map to the same word in L1?
2. Consider a 65,536 word L2 memory and a 4,096 word L1 direct mapped cache with block sizes of 512
words.
(2 points each)
a. How many blocks are in L1?
b. How many block bits are in the L2 address?
c. How many index bits are in the L2 address?
d. How many tag bits are in the L2 address?
e. How many address ranges in L2 will map to the same block in L1?
3. Consider a 65,536 word L2 memory and a 4,096 word L1 2-way associative cache with block sizes of
512 words. Since L1 consists of two sets, each set will be 2,048 words large.
(2 points each)
a. How many blocks are in each set in L1?
b. How many block bits are in the L2 address?
c. How many index bits are in the L2 address?
d. How many tag bits are in the L2 address?](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fd6e7f323-46d4-4f83-ac2e-dd36c3e4b54d%2Fc49c0310-2cfa-41d6-9a07-16015ff4923a%2F9sfja4_processed.jpeg&w=3840&q=75)
Transcribed Image Text:1. Consider a 128-word L2 memory and a 16-word direct mapped L1 cache.
(2 points each)
a. How many bits wide is the L2 address?
b. How many index bits are in the L2 address?
c. How many tag bits are in the L2 address?
d. How many words from the L2 memory will map to the same word in L1?
2. Consider a 65,536 word L2 memory and a 4,096 word L1 direct mapped cache with block sizes of 512
words.
(2 points each)
a. How many blocks are in L1?
b. How many block bits are in the L2 address?
c. How many index bits are in the L2 address?
d. How many tag bits are in the L2 address?
e. How many address ranges in L2 will map to the same block in L1?
3. Consider a 65,536 word L2 memory and a 4,096 word L1 2-way associative cache with block sizes of
512 words. Since L1 consists of two sets, each set will be 2,048 words large.
(2 points each)
a. How many blocks are in each set in L1?
b. How many block bits are in the L2 address?
c. How many index bits are in the L2 address?
d. How many tag bits are in the L2 address?
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