1- Figure 1 below shows the timing diagram for the K J flip flop with positive clock. Redraw Q assuming negative clock. K CLK Time Q Reset Toggle No Set Toggle Toggle change Figure 1 2- Derive the characteristic equation and draw the state diagram of the J-K flip flop. 3- Consider the D flip flop: a. Write the behavioral architecture code for the D flip flop. b. Write the Excitation Table of the D flip flop. 4- Construct MOD 11 synchronous counter. Calculate the output frequency if the input frequency is 1Mz. Determine the counting after 76 pulses if the counter starts from 5. 5- Analyze the synchronous counter shown in Figure 2. Construct the state diagram to show the counting sequence of the counter. B A J High J Q J Clock СК CK CK K K Q K Figure 2 6- Design synchronous counter to count the sequence 0-1-2-3-4-5-0. Use JK flip flop.

1- Figure 1 below shows the timing diagram for the K J flip flop with positive clock. Redraw Q assuming negative clock. K CLK Time Q Reset Toggle No Set Toggle Toggle change Figure 1 2- Derive the characteristic equation and draw the state diagram of the J-K flip flop. 3- Consider the D flip flop: a. Write the behavioral architecture code for the D flip flop. b. Write the Excitation Table of the D flip flop. 4- Construct MOD 11 synchronous counter. Calculate the output frequency if the input frequency is 1Mz. Determine the counting after 76 pulses if the counter starts from 5. 5- Analyze the synchronous counter shown in Figure 2. Construct the state diagram to show the counting sequence of the counter. B A J High J Q J Clock СК CK CK K K Q K Figure 2 6- Design synchronous counter to count the sequence 0-1-2-3-4-5-0. Use JK flip flop.

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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Concept explainers

Latches and Flip Flop

Just like logic gates, the latches and flip-flops are the important elements of an electronic circuit. The logic gates form the important part of combinatorial circuits, while the latches and flip-flops form the essential part of a sequential circuit. Sequential circuits form the important concept of automata theory in electronics and electrical engineering, these circuits are a kind of logic circuit whose output depends on both present input and past inputs, that is, the input history.

Question

1- Figure 1 below shows the timing diagram for the K J flip flop with positive clock.
Redraw Q assuming negative clock.
K
CLK
ResetE
Toggle
No
Set
Toggle
Toggle
change
Figure 1
2- Derive the characteristic equation and draw the state diagram of the J-K flip flop.
3- Consider the D flip flop:
a. Write the behavioral architecture code for the D flip flop.
b. Write the Excitation Table of the D flip flop.
4- Construct MOD 11 synchronous counter. Calculate the output frequency if the input
frequency is 1Mz. Determine the counting after 76 pulses if the counter starts from 5.
5- Analyze the synchronous counter shown in Figure 2. Construct the state diagram to show
the counting sequence of the counter.
B
A
J
High
J
Q
J
Clock
> CK
СК
O CK
K
Q
K
Q
к Q
Figure 2
6- Design synchronous counter to count the sequence 0-1-2-3-4-5-0. Use JK flip flop.

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1) The following waveform are applied to the J-K flip flop with negative edge clock pulse. Assuming the flip flop is initially set, determine the Q output. (a) 2) Repeat question 1 for positive edge clock pulse.
Design synchronous counters that go through each of the following sequences f. 1 3 5 7 6 4 2 0 and repeat usingi. JK flip flopsii. D flip flops Show a state diagram, indicating what happens if it initially is inone of the unused states for each of the designs.
a. Construct a synchronous 3-bit Up/Down counter with irregular sequence by using J-K flip-flops. The state diagram is shown below. Y = 1 00 010 110 Y =0 101 111 0, 011 100 001 b. Construct an asynchronous counter with a modulus of eleven by using J-K flip-flops. The counter should follow the straight binary sequence from 0000 through 1011. c. The counters are used in cascading in order to achieve the higher modulus operation. A certain application requires an overall modulus of 39,000 which can be achieved by placing the counters in cascading. You are requested to design a circuit for the said purpose by using 74HC161.
question in picture please