Lab3_report

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Apr 3, 2024

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COEN 212 Digital Systems Design 1 Lab Section: EB-X Experiment #3: Design of Medium Scale Integration (MSI) Components Lab instructor: Alireza Esmailzehi Date Performed: Nov 1, 2021 Date due: Nov 15, 2021 “ I certify that this submission is my own original work and meets the Faculty’s Expectation of Originality” Nov 11, 2021

OBJECTIVES In this experiment, the students were to design a two-to-one multiplexer and familiarize with word-sized and single bit operands. In addition, students were to design a combinational adder circuit. THEORY The two-to-one multiplexer (also known as 2x1 mux) are circuits has a goal of switching between inputs for different outputs. The 2x1 mux is composed of two inputs, a switch (or a selector), and an output. Here is an oversimplified analogy of a 2x1 mux. Assuming a student was having a phone call, suddenly another phone call arrives while the student was speaking. On the phone’s screen, the student will see these following options: “End and Answer” and “Hold and Answer”. Whichever the student chooses, a digital switch will rotate and connects the other input to the output. The figure attached below is a diagram of a 2x1 mux. Image source: WatElectronics.com Multiplexers are critical assets in Circuit Design because they simplify the circuit by reducing the number of gates used. The 2x1 mux was implemented in this experiment using the following chips: 7404, 7408 and 7432. The figure below shows the schematic diagram of the 2x1 mux, where W0 and W1 are the inputs, S is the selector, and F is the output.

Image source: SlideServe The diagram has the following truth table: 2x1 MUX Truth Table S W0 W1 Out 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 Another type of multiplexer is a 2x1 word-sized mux. This type of multiplexer has two bits for each input. When there is more than one bit in one input, it is called a bus. Each bit in a bus requires a 2x1 mux. The figure below, taken from the lab manual, demonstrate a word sized 2x1 mux.

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The schematic diagram for the 2x1 word-size mux is composed of two schematic diagrams of 2x1 mux. Half adder are electronic circuits that perform binary addition of two single binary digit which gives a two-digit output and carry value. It performs these operations using a XOR gate with an AND gate. To understand the half adder, one must understand binary addition. Like regular addition, binary addition also follows the rules such as 0+0 = 0, 0+1 =1, 1+0 = 1, but 1+1 = 10. The binary number 10 is made up of two bits, so for one bit representation, 1+1 is written as 1+1 = 0 with a Carry value of 1. The following table depicts the half adder operations. Half Adder Truth Table A B Carry Sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 It can be observed that the Sum column could be implemented using an XOR gate, and the Carry column with AND gate.

Image source: Techopedia. The half adder could be implemented with AND gates and OR, but for this experiment, the students implemented the circuit using the AND gate with the XOR gate. The full adder is another digital circuit that performs binary addition of three 1-bit input and gives a Sum and Carry output. Just like the Half adder, the full adder is composed of two Half adders. The following diagram depicts a full adder in form of schematic diagram. Image source: ElProCus The truth table below belongs to the full adder.

INPUT OUTPUT A B Cin Cout Sum 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 Analysis Before going further, one must understand what an Adder and the difference between a Half Adder and a Full Adder is. An Adder is a logic circuits what is used for addition of numbers, and there are two types of adders: Half adder and Full adder. Half adder is a logic circuit that only has two 1-bit inputs which give a carry and a sum value. The input that adds is called augend, and the input that is being added onto is called addend. When a half adder is used, one can design simple addition. The students were able to build the half adder in the experiment, and it performed as expected to the truth table value. One of the limitations of using Half Adders is that Half Adders can only add low amounts of bits. If calculations involving several bits, Full Adders are used. The Full Adder is a logic circuit just like the Half Adder, but it performs addition of three 1-bit inputs, where two bits are called operands and the other is called Carry in. The output of the Full Adder is the same as that of the Half Adder. The Full Adder can perform addition of several bits together and is more commonly used than the Half Adder, but the Full Adder can be implemented using two Half Adders. RESULTS Students were successful in building a half adder using an AND gate and a XOR gate. To verify if the built circuit is correct, the students compared the outputs with the truth table of the half adder. The pictures below shows a half adder successfully built while comparing to the truth table.

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The students were also successful in building a Full Adder. The photos below depict a Full Adder in action. The output LED 0 corresponds to the SUM output and the LED 1 corresponds to the Carry Out.

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QUESTIONS 1) How many rows would the truth table of a combinational 32-bit parallel adder contain? Express your answer as a power of two. State any assumptions you may have made to deduce your answer. Truth table needs 2^32 rows for a 32-bit parallel adder. Assumptions: Have enough time and paper to draw the truth table and fill in. 2) Would it be practical to design a 32-bit parallel adder using the techniques of Boolean minimization to obtain the SOP expressions for each of the outputs? It would be practical because it will simplify the circuit and make it less error prone. 3) How many full-adders would be required to construct a 32-bit ripple carry adder? It would require 32 full-adders, because 3-bit ripple carry adder has 3 full-adders. CONCLUSION The experiment was successful, and the students were able to design and implement the different types of 2x1 MUX, Full Adder and Half Adder.