Practice_Final (2)

pdf

School

George Mason University *

*We aren’t endorsed by this school

Course

231

Subject

Computer Science

Date

Dec 6, 2023

Type

pdf

Pages

Uploaded by CoachTurtle8298

Final Exam Spring 2022 1. Which of the following is not a functionally complete set? (a) {NOT, AND, OR} (b) {AND, OR} (c) {NOT, AND} (d) {NOT, OR} (e) {NAND} 2. What is the value on the gate input of a pMOS transistor that causes it to be closed? (a) Logic-1 (i.e. the supply voltage, VDD) (b) Logic-0 (i.e. ground, GND) (c) Either logic-1 or logic-0 (d) The Gate input does not control the pMOS transistor. (e) None of the above. 3. Silicon is doped with which element to create P-type silicon? (a) Phosphorus (b) Boron (c) Carbon (d) Arsenide (e) Copper 4. For which value of the noise margin (NM) will a logic circuit not function properly? (a) NM > 0 (positive) (b) NM < 0 (negative) (c) 0 < NM < 1 (d) All of the above. (e) None of the above. 5. For which value of the fan-out (FO) will a logic circuit not function properly? (a) FO > 0 (positive) (b) FO < 0 (negative) (c) FO = 0 (d) All of the above. (e) None of the above

Final Exam Spring 2022 6. (a) NML = 0.2 V NMH = 0.5 V (b) NML = 0.7 V NMH = 0.6 V (c) NML = 0.3 V NMH = 0.7 V (d) NML = 0.7 V NMH = 0.3 V (e) NML = 0.96 V NMH = 0.9 V 7. Use Boolean algebra to simplify the given Boolean expression. Determine the minimum (i.e. simplest) expression. F(A,B,C) = (A’ + B)(A + C) (a) F = A’C + AB (b) F = A’B + BC (c) F = AB + BC + A’C (d) F = A’A + A’C + AB + BC (e) Cannot be simplified. 8. Use Boolean algebra to simplify the given Boolean expression. Determine the minimum (i.e. simplest) expression. F(A,B,C) = AB’C + A’BC (a) F = AB’ (b) F = B’C (c) F = AC (d) F = C (e) Cannot be simplified.

Final Exam Spring 2022 9. Use Boolean algebra to simplify the given Boolean expression. Determine the minimum (i.e. simplest) expression. F(A,B,C) = ABC + AB’C + A’BC + ABC’ (a) F = AC + A’BC + ABC’ (b) F = AB’C + BC + ABC’ (c) F = A’BC + AB’C + AB (d) F = AB + AC + BC (e) F = AB’C + A’BC + ABC’ 10. Use Boolean algebra to simplify the given Boolean expression. Determine the minimum (i.e. simplest) expression. Hint: use DeMorgan’s Theorems. F(A,B,C) = (AB’ + C)’ (a) F = A’ + BC’ (b) F = AC + B’C (c) F = A’C’ + BC’ (d) F = A’B + C’ (e) F = (AB’)’ + C’ 11. Which of the following is a minterm of the function F(A,B,C,D)? (a) A’B (b) AB’C (c) A’C’D’ (d) ABC’D (e) B’D 12. Determine the critical path delay. (a) 19 nsec (b) 42 nsec (c) 55 nsec (d) 41 nsec (e) 29 nsec

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 13. Determine the critical path delay. (a) 26 nsec (b) 25 nsec (c) 21 nsec (d) 43 nsec (e) 55 nsec 14. Which of the following is not a maxterm of the function F(A,B,C,D)? (a) A + B’ + C’ + D’ (b) A’ + B’ + C + D (c) A + B + C + D (d) A + C’ + D (e) A’ + B + C + D’ 15. A combinational logic circuit is specified by the truth table given below. For three of the input combinations, the output of the circuit does not matter (ie. “don't care” outputs). The circuit that is realized implements the logic function F(A,B,C) = A'.C' + B. What will the circuit output for the input combination < A, B, C > = < 1, 1, 0 > ? (a) 0 (b) 1 (c) X (don't care) (d) unknown

Final Exam Spring 2022 16. Which binary code is used to identify the rows and columns in a 4-variable Karnaugh map? (a) Binary code (b) Gray code (c) One-hot code (d) Excess-3 code (e) None of the above 17. What is the number of the cell highlighted in the K-map below? (a) 7 (b) 6 (c) 10 (d) 13 (e) 9 18. Derive the minimum-cost POS expression for the logic function given below. F(A,B,C,D) = m( 4, 6, 7, 8, 10, 12, 13, 15 ) ∑ (a) (A+D)(B’+D)(A+C)(A'+B) (b) (A+B’)(B’+D)(A+C+D')(A'+B+C) (c) (A+B’)(B’+D)(A+C+D')(A'+B+C) (d) (A+B)(B+D')(A+C+D')(A'+B'+C'+D) (e) (A+C)(B’+D)(A+D')(A+B’+C) 19. Which is the following 8-bit 2’s Complement binary number represents the most negative decimal value? (a) 00000000 (b) 11111111 (c) 10000000 (d) 011111111 (e) 10110100

Final Exam Spring 2022 20. Convert the decimal integer 204 to unsigned binary. (a) 10110110 (b) 01101100 (c) 10110101 (d) 01101010 (e) 11001100 21. Convert the binary number 110110100100111 to hexadecimal. (a) 2ADF (b) 5DEF (c) 6D27 (d) 8DFE (e) 7DA3 22. Convert the binary number 0.1101 to decimal. (a) 0.4532 (b) 0.8125 (c) 0.2361 (d) 0.4526 (e) 0.3412 23. Convert the 8-bit Two’s Complement binary number 10110101 to decimal. (a) -61 (b) -29 (c) -51 (d) -75 (e) -91 24. Convert the 8-bit Two’s Complement binary number 01011001 to decimal. (a) 34 (b) 29 (c) 77 (d) 89 (e) 21

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 25. Convert the decimal number -23 to an 8-bit Two's Complement binary number. (a) 10111011 (b) 10110001 (c) 01100101 (d) 11010100 (e) 11101001 26. Which of the following 8-bit 2’s Complement binary numbers represents the most positive decimal value? a) 00000000 (b) 11111111 (c) 10000000 (d) 01111111 (e) 10100101 27. Why do computers use Two's Complement number representation? (a) Addition overflow errors can be corrected when using Two's Complement representation. (b) Two's Complement representation can represent more numbers than any other number representation. (c) Two's Complement representation is the only way to represent negative numbers. (d) Subtraction circuits (separate from addition circuits) are not needed in Two's Complement representation. 28. (a) (1) only. (b) (2) only. (c) Both (1) and (2). (d) Neither (1) nor (2). (e) Cannot be determined.

Final Exam Spring 2022 29. (a) Overflow occurred. Carry-out did not occur. (b) Carry-out occurred. Overflow did not occur. (c) Both occurred. (d) Neither occurred. (e) Cannot be determined 30. Which value of s1s0 allows i2 to pass through to y? (a) s1s0 = 00 (b) s1s0 = 11 (c) s1s0 = 10 (d) s1s0 = 01 (e) Cannot be determined. 31. What does the following circuit output? (a) y3y2y1y0 = 0000 (b) y3y2y1y0 = 0010 (c) y3y2y1y0 = 1000 (d) y3y2y1y0 = 0100 (e) y3y2y1y0 = 0110

Final Exam Spring 2022 32. What does the circuit output? (a) e1e0 = 00 (b) e1s0 = 11 (c) e1e0 = 10 (d) e1e0 = 01 (e) Cannot be determined. 33. Which of the following statements is INCORRECT? (a) The FSM’s next state is based on the present state and the FSM inputs (b) More FSM transitions likely means more state register bits. (c) The state register stores the value of the FSM’s present state. (d) More FSM outputs likely means more combinational logic. 34. How many select inputs are needed for a 32-to-1 multiplexer? (a) 32 (b) 16 (c) 6 (d) 5 (e) 4 35. For an 8-to-1 multiplexer, which data input is selected when the select input is S2S1S0 = 110. (a) D0 (b) D3 (c) D6 (d) D2 (e) D1

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 36. Determine the logic function implemented by the multiplexer circuit given below. Assume that S1 = 1, S0 = 0. (a) F(A,B) = AB (b) F(A,B) = A + B (c) F(A,B) = A xor B (d) F(A,B) = A’ (e) F(A,B) = B’ 37. Assume that an LED is illuminated by a high voltage (ie. logic-1). Identify the decoder that will light only LED #2 for the given input. (a) (b) (c) (d) 38. Assume that an LED is illuminated by a low voltage (ie. logic-0). Identify the decoder that will light only LED #1 for the given input (a) (b) (c) (d)

Final Exam Spring 2022 39. Assume that an LED is illuminated by a high voltage (ie. logic-1). Which LED or LEDs will be illuminated for the given input? (a) Only LED #5. (b) All LEDs except #5. (c) Only LED #2. (d) All LEDs except #2. (e) None of the LEDs. 40. Consider the 4-to-2 Encoder given below. Note: This is NOT a Priority Encoder. For the input A3A2A1A0 = 0110 what is the value of the output Y1Y0 ? (a) 00 (b) 01 (c) 10 (d) 11 (e) Cannot be determined 41. Consider the 4-to-2 Priority Encoder given below. For the input A3A2A1A0 = 0110 what is the value of the output Y1Y0 Z ? (a) 00 0 (b) 01 1 (c) 10 1 (d) 11 0 (e) 00 1

Final Exam Spring 2022 42. What value is stored in the SR latch at the time indicated? (a) Q = 0 (b) Q = 1 (c) Cannot be determined 43. What value is stored in the Gated SR latch at the time indicated? (a) Q = 0 (b) Q = 1 (c) Cannot be determined

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 44. How many select bits are needed for an 8-bit ALU that performs 10 operations? (a) 2 (b) 3 (c) 4 (d) 8 (e) 10 45. Determine the arithmetic operation performed by the 4-bit adder circuit given below. Assume Two’s Complement Addition. (a) S = A + 1 (b) S = A + 8 (c) S = A – 1 (d) S = A + 7 (e) None of the above 46. Determine the arithmetic operation performed by the 4-bit adder circuit given below. Assume Two’s Complement Addition. (a) S = A + 1 (b) S = A + 8 (c) S = A – 1 (d) S = A + 7 (e) None of the above

Final Exam Spring 2022 47. Consider the two binary numbers given below. A = 1001 1011 B = 0111 0101 Which of the following statements is true? A < B if A and B are … (a) unsigned binary numbers. (b) 2’s Complement binary numbers. (c) either unsigned or 2’s Complement binary numbers. (d) Cannot be determined. 48. Which arithmetic operation can be used to determine if two operands are equal? (a) addition (b) subtraction (c) multiplication (d) None of the above. 49. Determine the output of the barrel shifter for the input conditions given below (a) y3 y2 y1 y0 = 0 0 0 0 (b) y3 y2 y1 y0 = 0 0 0 1 (c) y3 y2 y1 y0 = 0 1 1 0 (d) y3 y2 y1 y0 = 1 0 0 1 (e) y3 y2 y1 y0 = 1 1 0 1 50. What does a timer use? (a) up-counter, a d flip flop, a clock (b) a register, a base time unit (c) down-counter, a register, a base time unit (d) up-counter, a t flip flop, a clock

Final Exam Spring 2022 51. Given a timer with a base time unit of 1 microsecond, what number must be loaded into the timer to generate a pulse every 30 milliseconds? (a) 3 (b) 30 (c) 300 (d) 3000 (e) 30000 52. What is the maximum time interval in microseconds that a 4-bit timer can achieve? Assume the base unit is 1 microsecond. (a) 18 (b) 16 (c) 7 (d) 6 (e) 4 53. Determine the number of transistors. (a) 8 (b) 6 (c) 2 (d) 4 (e) 1 54. Determine the number of transistors. (a) 10 (b) 12 (c) 14 (d) 8 (e) 4

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 55. Determine the number of transistors. (a) 10 (b) 12 (c) 14 (d) 8 (e) 4 56. Determine the number of gate delays (a) 1 (b) 2 (c) 4 (d) 6 (e) 8 57. y = a + bcd. Size = ___ transistors? (a) 4 (b) 6 (c) 8 (d) 10 (e) 12 58. Which of the following statements is true of a carry lookahead adder? (a) An adder circuit precomputes all carry bits at the same time. (b) The adder circuit requires fewer gates than a carry ripple adder. (c) The adder circuit has no tradeoff between circuit delay and circuit size compared to a carry ripple adder (d) The adder circuit ripples each carry bit from digit to digit through the circuit.

Final Exam Spring 2022 59. How large is the prefix mebi? (a) 2 10 (b) 2 20 (c) 2 30 (d) 2 40 60. For memory, 1K refers to what value? (a) 1000 (b) 1064 (c) 1030 (d) 1024 (e) 1026 61. Consider a random access memory (RAM) with the following specifications: 128 locations, each location stores 16 bits (i.e. word size = 16 bits). How many address lines does the memory have? (a) 1 (b) 3 (c) 6 (d) 7 (e) 9 62. A 32x8 register file consists of ____ registers. (a) 18 (b) 24 (c) 32 (d) 40 63. Given a 32x8 register file, how many bits is W_addr? (a) 2 (b) 3 (c) 4 (d) 5

Final Exam Spring 2022 64. For the given values of W_addr, W_en, and W_data, indicate the register file's contents in the clock cycle Reg3, cycle 5. (a) 52 (b) 19 (c) 12 (d) 710 (e) 256 65. A wafer holds 50 chips and costs $100. What is the cost per chip, assuming all chips are usable? (a) $1 (b) $5 (c) $3 (d) $4 (e) $2 66. A wafer holds 50 chips. 20 defects cause 15 to be unusable. What is the yield? (a) 60% (b) 80% (c) 20% (d) 70% (e) 90% 67. Implement the given logic function using an 4-to-1 multiplexer (a) (b) (c)

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Final Exam Spring 2022 (d) (e) Long-answer problems. Show all your work! 1. Write a VHDL description for the logic circuit given below. Use behavioral VHDL. Your VHDL description must include an entity statement and an architecture statement. (Answer is on problem set 9)

Final Exam Spring 2022 2. Write the VHDL description for an 8-to-1 multiplexer. Use a with-select-when statement. (Answer is on problem set 11) 3. Write the VHDL code to implement the FSM described in the state graph below. (Answer is on problem set 14)

Final Exam Spring 2022 4. (Answer is on problem set 19)

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

Practice_Final (2)

Related Documents