lab07.Handout (6)

Kettering University Computer Architecture and Organization Lab Exercise 7 Pipelined MIPS with Data Forwarding Unit Winter 2023 Note Tests/final may contain questions about lab exercises. Prelab (10%): Go over this handout carefully, and do Assignments 1 through 5 . Then upload one handout (prelab) per group in the .pdf format to Blackboard by 11:59 pm on the Monday before the lab day. Lab report: Upload one handout (report) per group (in .pdf ) to Blackboard before 11:59 pm on the Sunday following the lab day and after completing all the assignments, answering all the questions, and showing your lab work to the lab instructor individually . A demo sign-up sheet will be posted if necessary. In the lab report, please correct your prelab incorrect answers, if any. You will need your lab07 files in lab08, i.e., you will only be able to do lab08 if you are done with lab07! Name : Lab Partner’s Name : Purpose of this lab experiment (please write in your own words)

CE-422/622 Lab Exercise 7 Objective Better understand how Data Forwarding Unit resolves data hazards. Introduction You will add a bypassing or data forwarding unit ( FU ) to the pipelined MIPt you modeled and tested in lab06 . In the MIPS architecture, there are two types of data producers, R-type and lw , and three types of data consumers, namely R-type , lw, and sw . In today's lab, do not worry about beq .   The FU will resolve all the data hazards except for lw-type producers immediately followed by a consumer, for which a NOP has to be inserted. What to hand in  Upload this handout in the .pdf format after you have completed all the assignments and answered all the questions.  Show simulation results of your functional MIPS in Assignment 8 to the lab instructor.  Also, be prepared to individually answer the lab instructor’s questions rearguing today’s lab exercise and what your group did. Note: You will need your lab07 files in lab08 . So, you will only be able to do lab08 if you are done with lab07 ! During your presentation, suppose that you are selling your product. When I ask if your product works, please do not tell me you don’t know; this is one of the worst possible answers! If you are ready to demo, you should be able to prove that your product does work! You should work closely with your lab partner. You are also urged to talk to other students, teach them or learn from them, as this will enhance your performance; however, do NOT copy from them! Note  If you copy and paste a .doc program into the ModelSim editor, delete all the single and double quotes (‘ ’ “ ”), if any, and type them again.  In your do files, use prefix 2# for binary numbers and prefix 16# for hexadecimal numbers if the default radix is not what you need; e.g., 2#1011 means binary 1011 . Go to Simulate > Runtime Options … to change the default radix.  Assign one full line to each comment in .do files: # put 3 in the rs field force rs 2#00011  The deposit option in .do files allows the forced value to be overwritten. Page 2 of 8

SW programmer’s expectations Simulation results CE-422/622 Lab Exercise 7 Figure 1. Test code: Fill out the left sub-columns based on a software programmer’s expectations, and the right sub-columns based on your simulation results. Do they match? Prelab Ends Here. 6 Modify the register file described in regsiters.vhd to avoid data hazards in the case of vertical dependence lines as you described in Assignment 2. You copied this and other ModelSim files from lab06 to lab07 folder in Assignment 5. 7 pipelined.vhd is the MIPS top-level module you completed and tested in lab06 . You placed this file (along with all of its components) in your lab07 folder in Assignment 5 . Go over the datapath shown in Figure 2. rigorously . Using the help provided below, add the forwarding unit behaviorally and also the two new multiplexers (controlled by the forwarding unit) structurally to pipelined.vhd . Compile the whole MIPS, and resolve the syntax errors, if any. Page 4 of 8

CE-422/622 Lab Exercise 7  Add new signals to pipelined.vhd for the Forwarding Unit: SIGNAL ForwardA : BIT_VECTOR (1 DOWNTO 0); SIGNAL ForwardB : BIT_VECTOR (1 DOWNTO 0); SIGNAL dataB: BIT_VECTOR(31 DOWNTO 0); SIGNAL ID_EX_RS : BIT_VECTOR (4 DOWNTO 0); SIGNAL ID_EX_RT : BIT_VECTOR (4 DOWNTO 0); SIGNAL ID_EX_RD : BIT_VECTOR (4 DOWNTO 0); SIGNAL RegWrite_EX_MEM : BIT;  You need to make some changes to the following in pipelined.vhd: EX_MEM_in <= ... ALU_mux : mux32 ...  Comment out the following line in pipelined.vhd as "alua" has a different meaning now: alua <= ID_EX(105 DOWNTO 74);  Behavioral Modeling of Forwarding Unit using Conditional Signal Assignments: ID_EX_RS <= ID_EX(9 DOWNTO 5); ID_EX_RT <= ID_EX(4 DOWNTO 0); ID_EX_RD <= ID_EX(14 DOWNTO 10); RegWrite_EX_MEM <= EX_MEM(102); -- Fill in the blanks: ForwardA <= "10" AFTER 1 ns WHEN ((RegWrite_EX_MEM = '1') AND ... AND ... ELSE "01" AFTER 1 ns WHEN ((RegWrite_MEM_WB = '1') AND ... AND ... ELSE ... Page 5 of 8

CE-422/622 Lab Exercise 7 9 Copy ONLY the code lines that you added to pipelined.vhd to model the forwarding unit and the two multiplexers: Page 7 of 8

C ontrol signals from top to bottom: ALUOp[2], ALUSrc, RegDst, MemWrite, MemRead, Branch, MemtoReg, RegWrite EX MEM ID WB M EX WB 146 EX/MEM MEM/WB 1 IF/ID DM WB M WB FU ALU 0 1 rt rd 0 1 2 0 1 2 ID/EX rs rs Control RF A1 A2 D3 A3 rt forwardA: select signal of upper mux forwardB: select signal of lower mux Broken lines applied to FU are RegWrite alua alub dataB 2 3 106 70 3 2 2 102 69 RegWrite_ MEM_WB 4 WriteRegister RegWriteData MemReadData_MEM_WB ALUresult_EX_MEM data_to_mem ALUresult_MEM_WB MemReadData ReadData1 ReadData2 ALUresult ReadAdrs1 ReadAdrs2 ID_EX(4 DOWNTO 0) ID_EX(9 DOWNTO 5) EX_MEM (4 DOWNTO 0) EX_MEM(102) MEM_WB(4 DOWNTO 0) RegWrite_MEM_WB MEM_WB(69) ALUResult_EX_MEM RegWriteData RegWriteData 9 10 41 73 42 74 105 0 106 137 ID_EX(73 DOWNTO 42 ) ID_EX(105 DOWNTO 74) Instruction A D 36 37 68 0 4 5 4 0 5 36 37 69 70 101 68 WriteRegister_MEM_WB WriteRegister_EX_MEM RegWrite_EX_MEM ID_EX_RS ID_EX_RT ID_EX_RD ID_EX(25:21) ID_EX_RT CE-422/622 Lab Exercise 7 Figure 2. MIPS Datapath with FU Page 8 of 8