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2.1: Inside the Compiler 0.2 / 0.2 pts Question 1 Select which of the following are NOT part of the compilation process: Program Execution Correct! Correct! Syntax Analysis Debugging Correct! Correct! Machine Code Generation Lexical Analysis Optimization Testing Correct! Correct! 0 / 0.2 pts Question 2
In the compilation process, the ______ performs program analysis and optimization. Linker Lexical Analyzer (lexer) Assembler Middle Stage rrect Answer rrect Answer Syntax Analyzer (parser) Backend u Answered u Answered 0.2 / 0.2 pts Question 3 Which of the follow best matches the function of the Backend in the compilation process? Separates the input source code text into tokens. Combines partial programs and libraries into a single executable. Performs syntax rules checking and constructs a symbol table and abstract syntax tree.
Performs program analysis and optimization. Arranges the symbol table in memory and generates final executable machine code. Correct! Correct! 0.2 / 0.2 pts Question 4 Which of the follow best matches the definition for Syntax Analysis? Translates assembly language code into machine code. Performs program analysis and optimization. Performs syntax rules checking and constructs a symbol table and abstract syntax tree. Correct! Correct! Combines partial programs and libraries into a single executable. Arranges the symbol table in memory and generates final executable machine code. Separates the input source code text into tokens. 0.2 / 0.2 pts Question 5
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In the compilation process, the ______ arranges the symbol table in memory and generates final executable machine code. Linker Lexical Analyzer (lexer) Syntax Analyzer (parser) Backend Correct! Correct! Middle Stage
2.2: Inside a CPU 0.2 / 0.2 pts Question 1 A computer consists of five major modules. What module does ALU belong to? Memory Control Unit Data Path Correct! Correct! Peripheral 0.2 / 0.2 pts Question 2 The ______ of the CPU act(s) as an interface between the processor and the outside world, including long-term storage and user interfaces. ALU
Datapath Memory Control Unit I/O Peripherals Correct! Correct! Registers 0.2 / 0.2 pts Question 3 Which of the following best matches the definition of the Registers? Operates on one or more numerical values to perform calculations and operations on data. Contains the ALU and Registers, and the interconnection between them. Acts as an interface between the processor and the outside world, including long-term storage and user interfaces. Stores a small number of pieces of information, commonly the temporary results of calculations. Correct! Correct! Stores a large number of pieces of information, including program data and instructions.
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Coordinates the flow of information around the processor. Carries data between the ALU, registers, memory, and peripherals. 0 / 0.2 pts Question 4 Which of the following best matches the definition of the Datapath? Carries data between the ALU, registers, memory, and peripherals. u Answered u Answered Contains the ALU and Registers, and the interconnection between them. rrect Answer rrect Answer Acts as an interface between the processor and the outside world, including long-term storage and user interfaces. Stores a small number of pieces of information, commonly the temporary results of calculations. Stores a large number of pieces of information, including program data and instructions. Coordinates the flow of information around the processor.
0.2 / 0.2 pts Question 5 Which of the following best matches the definition of the Bus? Acts as an interface between the processor and the outside world, including long-term storage and user interfaces. Contains the ALU and Registers, and the interconnection between them. Stores a large number of pieces of information, including program data and instructions. Stores a small number of pieces of information, commonly the temporary results of calculations. Carries data between the ALU, registers, memory, and peripherals. Correct! Correct! Coordinates the flow of information around the processor. Operates on one or more numerical values to perform calculations and operations on data.
3.1: Measuring Computer Performance 0.2 / 0.2 pts Question 1 Which of the follow best matches this definition: The duration of one clock cycle in seconds. Instruction Count Execution Time Clock Period Correct! Correct! Clock Rate Average Cycles Per Instruction 0.2 / 0.2 pts Question 2 In the four-component performance formula, the CPU time is determined by (Select all correct answers)
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CPI Correct! Correct! Clock rate Correct! Correct! Compilation time Instruction count Correct! Correct! 0.2 / 0.2 pts Question 3 In comparing two computers, we execute a benchmark on each and measure the resulting speeds : Computer A: 9 Computer B: 6 How many times faster is Computer B than Computer A? 0.67 Correct! Correct! 0.7 margin of error +/- 0.1 rrect Answer rrect Answer 0 / 0.2 pts Question 4 In comparing two computers, we execute a benchmark on each and measure the resulting execution times : Computer A: 586 Computer B: 497
How many times faster is Computer A than Computer B? 1.179 u Answered u Answered 0.8 margin of error +/- 0.1 rrect Answer rrect Answer 0.2 / 0.2 pts Question 5 In comparing two computers, we execute a benchmark on each and measure the resulting speeds : Computer A: 733 Computer B: 979 How many times faster is Computer A than Computer B? 0.749 Correct! Correct! 0.7 margin of error +/- 0.1 rrect Answer rrect Answer
3.2: Propagation Delay 0.2 / 0.2 pts Question 1 A designer chooses to use an organization that increases the logic depth of the processor. All else being constant, will the performance likely increase, decrease, or stay the same? Decrease Correct! Correct! Increase Stay the Same 0.2 / 0.2 pts Question 2 Which of the following contribute to propagation delay (select all that apply) ? Clock Rate
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Logic Depth Correct! Correct! Wire length Correct! Correct! Transistor Size Correct! Correct! 0.2 / 0.2 pts Question 3 A designer chooses to use a manufacturing process that increases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same? Decrease Correct! Correct! Increase State the Same 0.2 / 0.2 pts Question 4 A designer chooses to use a manufacturing process that decreases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same? Increase Correct! Correct!
Decrease State the Same 0.1 / 0.2 pts Question 5 Select the items below that a designer can modify to effect propagation delay (select all that apply). Clock Rate u Answered u Answered Plastic Packaging Manufacturing Process Correct! Correct! Processor Organization Correct! Correct!
3.4: Execution Time 0 / 0.5 pts Question 1 A compiler produces a program with the following mix of instructions: Instruction Class Count 1 54 2 56 3 64 If it is executed on a 60 MHz processor with the following Instruction Class CPIs, what is the execution time in microseconds? Round to the nearest 0.1 microseconds. Instruction Class CPI 1 9 2 9 3 2 29.4 u Answered u Answered 18.6 margin of error +/- 0.1 rrect Answer rrect Answer
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0.5 / 0.5 pts Question 2 A compiler produces a program with the following mix of instructions: Instruction Class Count 1 6 2 4 3 2 If it is executed on a processor with a clock period of 6 microseconds, and the following Instruction Class CPIs, what is the execution time in microseconds? Round to the nearest 0.1 microseconds. Instruction Class CPI 1 6 2 5 3 9 444 Correct! Correct! 444 margin of error +/- 1 rrect Answer rrect Answer
4.1 Binary Number System 0.2 / 0.2 pts Question 1 In the field below, enter the 8-bit binary representation of the decimal value 25. 00011001 Correct! Correct! rrect Answers rrect Answers 00011001 0b11001 11001 0b00011001 0.2 / 0.2 pts Question 2 In the field below, enter the 8-bit binary representation of the decimal value 44. 00101100 Correct! Correct!
rrect Answers rrect Answers 0b00101100 0b101100 00101100 101100 0.2 / 0.2 pts Question 3 In the field below, enter the 8-bit binary representation of the decimal value 13. 00001101 Correct! Correct! rrect Answers rrect Answers 00001101 0b00001101 0b1101 1101 0.2 / 0.2 pts Question 4 How many symbols are used in the binary number system? 10 2 Correct! Correct! 8 16
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1 0.2 / 0.2 pts Question 5 A binary "0" is represented by what physical phenomena in a modern computer? High Voltage High Current Low Voltage Correct! Correct! Mechanical contacts closed. Low Current
4.2 Hexadecimal Number System 0.2 / 0.2 pts Question 1 In the field below, enter the decimal representation of the hexadecimal value 0x0497. 1175 Correct! Correct! rrect Answers rrect Answers 1175 1175.0 0.2 / 0.2 pts Question 2 In the field below, enter the decimal representation of the hexadecimal value 0x0FB0. 4016 Correct! Correct! rrect Answers rrect Answers 4016.0
4016 0.2 / 0.2 pts Question 3 In the field below, enter the hexadecimal representation of the binary value 0000101011111100 using 4 hex places. 0AFC Correct! Correct! rrect Answers rrect Answers 0x0AFC 0AFC 0xAFC 0.2 / 0.2 pts Question 4 In the field below, enter the decimal representation of the hexadecimal value 0x07D7. 2007 Correct! Correct! rrect Answers rrect Answers 2007 2007.0 0.2 / 0.2 pts Question 5
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In the field below, enter the hexadecimal representation of the binary value 0000011100101110 using 4 hex places. 072E Correct! Correct! rrect Answers rrect Answers 0x72E 0x072E 072E
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4.3 Two's Complement 0.2 / 0.2 pts Question 1 In the field below, enter the decimal representation of the 2's complement value 11000010. -62 Correct! Correct! rrect Answers rrect Answers -62 -62.0 0.2 / 0.2 pts Question 2 In the field below, enter the 2's complement representation of the decimal value -1 using 8 bits. 11111111 Correct! Correct! rrect Answers rrect Answers 0b11111111
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0b 11111111 11111111 0.2 / 0.2 pts Question 3 In the field below, enter the 2's complement representation of the decimal value -16 using 8 bits. 11110000 Correct! Correct! rrect Answers rrect Answers 0b 11110000 11110000 0b11110000 0 / 0.2 pts Question 4 In the field below, enter the 2's complement representation of the decimal value -38 using 8 bits. 10000001 u Answered u Answered rrect Answers rrect Answers 0b 11011010 0b11011010 11011010
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0.2 / 0.2 pts Question 5 In the field below, enter the decimal representation of the 2's complement value 11011010. -38 Correct! Correct! rrect Answers rrect Answers -38.0 -38
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4.4 Binary Arithmetic 0 / 0.2 pts Question 1 What indicates an odd number in the two’s complement representation? The most significant bit is 0 The most significant bit is 1 u Answered u Answered The least significant bit is 1 rrect Answer rrect Answer The least significant bit is 0 0.2 / 0.2 pts Question 2 In the field below, enter the binary result of the following calculation. The numbers are given 8-bit 2's complement format, and can be positive or negative. Your answer should also be provided as 8-bit 2's
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complement format. 11010001 + 11110101 = ? 11000110 Correct! Correct! rrect Answers rrect Answers 11000110 0b11000110 0b 11000110 0.2 / 0.2 pts Question 3 In the field below, enter the binary result of the following calculation. The numbers are given 8-bit 2's complement format, and can be positive or negative. Your answer should also be provided as 8-bit 2's complement format. 11110100 + 11010100 = ? 11001000 Correct! Correct! rrect Answers rrect Answers 0b11001000 11001000 0b 11001000 0.2 / 0.2 pts Question 4
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In the field below, enter the binary result of the following calculation. The numbers are given 8-bit 2's complement format, and can be positive or negative. Your answer should also be provided as 8-bit 2's complement format. 11100111 + 11010111 = ? 10111110 Correct! Correct! rrect Answers rrect Answers 10111110 0b10111110 0b 10111110 0.2 / 0.2 pts Question 5 In the field below, enter the binary result of the following calculation. The numbers are given 8-bit 2's complement format, and can be positive or negative. Your answer should also be provided as 8-bit 2's complement format. 00010101 + 11111110 = ? 00010011 Correct! Correct! rrect Answers rrect Answers 00010011 0b00010011 0b 00010011
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4.5 Overflow and Underflow 0 / 0.2 pts Question 1 Which of the following are causes of underflow? Subtracting from a variable when its value is at the upper end of the datatype range. u Answered u Answered Adding to a variable when its value is at the upper end of the datatype range. Subtracting from a variable when its value is at the lower end of the datatype range. rrect Answer rrect Answer Adding to a variable when its value is at the lower end of the datatype range. 0 / 0.2 pts Question 2
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A variable of type unsigned short stores a value of zero. If the variable value is decremented, what exception will occur? Underflow. rrect Answer rrect Answer No exception. u Answered u Answered Overflow. 0.2 / 0.2 pts Question 3 A variable of type signed short stores a value of -32768, If the variable value is decremented what exception will occur? Overflow. Underflow. Correct! Correct! No exception. 0.2 / 0.2 pts Question 4 A variable of type signed int stores a value of -2147483648, If the variable value is incremented what exception will occur?
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Overflow. Underflow. No exception. Correct! Correct! 0 / 0.2 pts Question 5 A variable of type signed short stores a value of zero, If the variable value is decremented what exception will occur? No exception. rrect Answer rrect Answer Underflow. u Answered u Answered Overflow.
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4.7 Endianness 0.5 / 0.5 pts Question 1 Select the definition of little-endian. The least significant byte of a multi-byte datatype is stored at a smaller address than the most significant byte. Correct! Correct! The most significant bit of a single byte datatype is stored at a smaller address than the least significant bit. The most significant byte of a multi-byte datatype is stored at a smaller address than the least significant byte. The least significant bit of a single byte datatype is stored at a smaller address than the most significant bit. 0.5 / 0.5 pts Question 2
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In which of the following situations will endianness become an issue? Transferring a memory block from a Little-Endian processor to a Big-Endian processor. Correct! Correct! Transferring a memory block from a Big-Endian processor to a Big-Endian processor. Transferring a memory block from a Little-Endian processor to a Little-Endian processor. Transferring a memory block from a Big-Endian processor to a Little-Endian processor. Correct! Correct!
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5.2: Project 1 Pre Quiz 0.05 / 0.05 pts Question 1 Which version of PLPTool should you be using? Hint: it is the latest version available. 4.1 5.1 5.2 Correct! Correct! 5.3 5.4 0.05 / 0.05 pts Question 2 Which one of the links below will take you to the current PLP user manual? http://progressive-learning-platform.github.io/home.html Correct! Correct!
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https://groups.google.com/forum/#!forum/progressive- learning-platform https://code.google.com/p/progressive-learning- platform/wiki/UserManual www.plp.com www.plp.edu 0.1 / 0.1 pts Question 3 What will the following instruction do? li $t5, 0xf0200000 Assign the value in $t5 to the LED array Assign the value of the LED array to $t5 Assign the value, 0xf0200000, to $t5 Correct! Correct! None of the above 0.1 / 0.1 pts Question 4
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What is the following instruction equivalent to? addiu $t2, $t3, 7 $t2 + $t3 = 7 $t2 = $t3 & 7 $t2 = $t3 + 7 Correct! Correct! $t3 = $t2 + 7 0.1 / 0.1 pts Question 5 The store word instruction is used to... Read from a memory address to a CPU register Write to a memory address from a CPU register Correct! Correct! Assign a value to a CPU register Access a label in a program 0.1 / 0.1 pts Question 6 Which of the following code snippets results in a loop?
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j label lw $t0, 0($t1) label: label: j new_label new_label: lw $t0, 0($t1) label: j label Correct! Correct! j label label: Correct, by having a jump to that label above the jump, a loop will be created that goes from the label to the jump instruction and then goes back to the label.
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6.2: Project 2 Pre Quiz 0.05 / 0.05 pts Question 1 Which of the following instructions will read a value from memory and copy it into a register? li lw Correct! Correct! sw addiu sll
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The load immediate ( li ) instruction loads a value given in the instruction (i.e. an immediate value) directly into a register and does not interact with memory. The store word ( sw ) instruction performs a write to memory rather than a read. Both the add immediate ( addiu ) and shift left logical ( sll ) instructions only interract with registers and do not read from or write to memory. Material for additional review on this topic can be found in the PLP manual section covering data- transfer operations (http://progressive-learning- platform.github.io/instructions.html#data-transfer- operations) . Relevant material is also covered in Lecture 3 - Load Word and R-Type Instructions in Week 2 under Lecture Videos . 0.05 / 0.05 pts Question 2 Which of the following instructions will write a value from a register into memory? li lw sw Correct! Correct! addiu
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sll The load immediate ( li ) instruction loads a value given in the instruction (i.e. an immediate value) directly into a register and does not interact with memory. The load word ( lw ) instruction performs a read from memory rather than a write to it. Both the add immediate ( addiu ) and shift left logical ( sll ) instructions only interract with registers and do not read from or write to memory. Material for additional review on this topic can be found in the PLP manual section covering data- transfer operations (http://progressive-learning- platform.github.io/instructions.html#data-transfer- operations) . Relevant material is also covered in Lecture 3 - Load Word and R-Type Instructions in Week 2 under Lecture Videos . 0.05 / 0.05 pts Question 3 At any given time while a program is running, where is the current value of the switches located? Register $s1 Register $t0 Memory address: 0xf0100000 Correct! Correct!
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Memory address: 0xf0200000 None of the above A register may be used as a pointer to the switches, meaning it contains the memory address of the switches, but it does not contain the value they are set to. The current value can only be obtained by reading the memory address the switches are mapped to, which is 0xf0100000 . Material for additional review on this topic can be found in the PLP manual section covering switches (http://progressive-learning- platform.github.io/implementation.html#switches) . Relevant material is also covered in Lecture 3 - Load Word and R-Type Instructions in Week 2 under Lecture Videos . 0.05 / 0.05 pts Question 4 If switch 1 and switch 2 are both set, what value will be read from the switches? 1 2 3
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4 6 Correct! Correct! 8 12 None of the above Switch 1 maps to the value, 2 (= 2), and switch 2 maps to the value 2 (= 4). With both of these switches set, the total value is 6 (= 2 + 4). 1 2 0.05 / 0.05 pts Question 5 Which types of instructions have delay slots? R-type instructions Jump instructions Branch instructions Jump and branch instructions Correct! Correct! 0.05 / 0.05 pts Question 6
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What is the smallest value that can be written to the address of the LED array in order to turn on all 8 LEDs? 0b1111 0xf 256 0xff Correct! Correct! 0xf01000ff The values, 0b1111 and 0xf, are equivalent and will only turn on the first 4 LEDs (0 to 3). The value 256 will not turn on any of the LEDs because it is 0x100 so the lowest 8 bits are all 0 or off. 0xff is the correct answer because it has a one in bits 0 to 7, but no where else. Writing the value, 0xf01000ff, will turn on all 8 LEDs, but it is not the smallest possible value that will do so. 0.05 / 0.05 pts Question 7 Which value, when written to the memory address of the LED array, will turn on LEDs 0, 2, and 4? 0b111
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0b01010 0b10101 Correct! Correct! 0b11111 420 Each LED maps to a different bit position so it corresponds to a particular power of 2. LED 0 maps to 2 , LED 2 maps to 2 , and LED 4 maps to 2 . In decimal this value would be equivalent to: 2 + 2 + 2 = 16 + 4 + 1 = 21. 0 2 4 4 2 0 0.05 / 0.05 pts Question 8 Assume that register $s1 contains 0xf0100000 . Which instruction will copy the current value of the switches into register $t2? addu $t2, $s1, $s1 li $t2, 0xf0100000 lw $s1, 0($t2) lw $t2, 0($s1) Correct! Correct!
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sw $s1, 0($t2) sw $t2, 0($s1) Add and load immediate instructions do not interact with memory so they will not be able to interact with the switches by themselves. The store word instruction ( sw ) writes a value to memory rather than reading from it. The instruction we want to use to read a value from the switches is load word ( lw ). The first argument in the load word instruction is the destination register, which is where the value copied from memory will be placed. We want our destination register to be $t2. Register $s1 contains the address of the switches, 0xf0100000 , so it is our pointer. That means the correct answer is lw $t2, 0($s1) . Relevant material is covered in Lecture 3 - Load Word and R-Type Instructions in Week 2 under Lecture Videos . 0.05 / 0.05 pts Question 9 Assume that register $s3 contains 0xf0200000 and register $t4 contains 0b101 . Which instruction will turn on LEDs 2 and 0? addu $s3, $s3, $t4 li $s3, 0b101
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lw $s3, 0($t4) lw $t4, 0($s3) sw $s3, 0($t4) sw $t4, 0($s3) Correct! Correct! Add and load immediate instructions do not interact with memory so they will not be able to interact with the LED array by themselves. The load word instruction ( lw ) reads a value from memory so it will not change the value of the LED array. The instruction we want to use to write a value to the LED array in order to turn specific LEDs on is store word ( sw ). The first argument in the store word instruction is the source register, which is where the value being copied to memory will come from. In order to turn on LEDs 2 and 0 we want to write the binary value, 0b101 , which is the value in $t4 so this is our source register. Register $s3 contains the address of the LED array, 0xf0200000 , so it is our pointer. That means the correct answer is sw $t4, 0($s3) . Relevant material is covered in Lecture 3 - Load Word and R-Type Instructions in Week 2 under Lecture Videos . 0.05 / 0.05 pts Question 10 For the following program, which label will be branched to?
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main: li $t0, 1 li $t1, 3 beq $t0, $t1, label_a nop addiu $t0, $t0, 1 beq $t0, $t1, label_b nop addiu $t0, $t0, 1 beq $t0, $t1, label_c nop addiu $t0, $t0, 1 beq $t0, $t1, label_d nop addiu $t0, $t0, 1 label_a: j main nop label_b: j main nop label_c: j main nop label_d: j main
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nop label_a label_b label_c Correct! Correct! label_d More than one of the labels will be branched to None of the labels will be branched to Notice that all of the branches in this program are checking for equality between register $t0 and $t1. Each branch in this program is followed by an instruction to increment $t0 so the branch that will be taken is the one where $t0 has reached 3 (the value $t1 has been set to). During the first two branches $t0 will have a value of 1 and 2 respecitively so those branches will not be taken. Register $t0 will have a value of 3 during the third branch to label_c so this branch will be taken. Because this branch contains a jump back to the top of the program where $t0 and $t1 are set to their original values, this is the only label that will ever be branched to.
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0.5 / 0.5 pts Question 11 Please download the following attached PLP project file: Mystery PLP Program (https://canvas.asu.edu/courses/151283/files/64804424? wrap=1) (https://canvas.asu.edu/courses/151283/files/64804424/download? download_frd=1) (https://canvas.asu.edu/courses/151283/files/64804424? wrap=1) This program has been partially converted into machine code so that its functionality cannot be easily identified by reading it. Your task is to use PLPTool's Watcher Window to see what the output of the program is for a specific input. Please open the attached file in PLPTool and perform the following steps: 1. Modify the first line in the program so that the load immediate instruction sets $t0 to the value, 53 2. Enter simulation mode (the blue button with ">SIM" on it) 3. Open the watcher window (the button with a magnifying glass icon) 4. Add registers $t0 and $t1 5. Run the program until $t0 is set to the value, 0 What value does $t1 now contain? NOTE: Your answer must be provided in decimal. Binary and hex formats will not be accepted. 374 Correct! Correct! 374 rrect Answer rrect Answer
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7.1 Procedure Call Process 0.2 / 0.2 pts Question 1 What are the main reasons for writing procedures in assembly programs? Select all that apply. Easier to reuse the code Correct! Correct! Avoiding use the jump table Higher performance in terms of execution time Easier to understand and to debug Correct! Correct! 0.2 / 0.2 pts Question 2 What register stores the return address of a procedure? $at
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$v0 $a0 $sp $ra Correct! Correct! $s0 $t0 0.2 / 0.2 pts Question 3 What register stores a return value of a procedure? $sp $a0 $at $t0 $ra $s0 $v0 Correct! Correct!
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0.2 / 0.2 pts Question 4 What register stores a temporary value that the callee procedure must save before performing it's task? $a0 $at $ra $v0 $s0 Correct! Correct! $sp $t0 0.2 / 0.2 pts Question 5 What register stores a temporary value that the caller procedure must save before calling a nested procedure? $s0 $ra $t0 Correct! Correct! $sp
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$a0 $at $v0
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7.4 Nested Procedures 0.2 / 0.2 pts Question 1 In a procedure call, what is responsible for saving the $t0 - $t9 registers? Operating System Callee Procedure Stack Caller Procedure Correct! Correct! 0 / 0.2 pts Question 2 In a procedure call, what is responsible for saving the $s0 - $s7 registers? Callee Procedure rrect Answer rrect Answer
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Operating System Caller Procedure u Answered u Answered Stack 0 / 0.2 pts Question 3 When we write the instruction “addi $sp, $sp, 8”, most likely we are preparing for: Executing instruction jal Executing instruction jr $ra rrect Answer rrect Answer Saving registers to stack u Answered u Answered Executing instruction j 0.2 / 0.2 pts Question 4 Where does program execution jump after the instruction “jr $ra”? End of the program Label $ra in the program
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Beginning of the program The instruction following the most recently executed jal instruction. Correct! Correct! 0 / 0.2 pts Question 5 In a procedure call, what is responsible for saving the $ra registers? Stack Caller Procedure rrect Answer rrect Answer Callee Procedure u Answered u Answered Operating System
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8.2: Project 3 Pre Quiz 0.1 / 0.1 pts Question 1 Which of the following will copy the contents of register t1 to register t0? lw $t1, 0($t0) lw $t0, 0($t1) sw $t1, 0($t0) sw $t0, 0($t1) move $t0, $t1 Correct! Correct! move $t1, $t0
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The load word (lw) and store word (sw) instructions move values between a register and a memory location and will not copy a value from one register to another. The only instruction that can accomplish this is the pseudo-op, move. For more information on this topic you can review the following sections of the manual on pseudo-ops and data transfer operations: http://progressive-learning- platform.github.io/instructions.html#pseudo- operations (http://progressive-learning- platform.github.io/instructions.html#pseudo- operations) http://progressive-learning- platform.github.io/instructions.html#data- transfer-operations (http://progressive-learning- platform.github.io/instructions.html#data-transfer- operations) 0 / 0.1 pts Question 2 What is the ASCII value of a space (' ') in hexadecimal? 0x20 rrect Answer rrect Answer 0x2E u Answered u Answered 0x32
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0x40 None of the above Please review the Lecture 5 - UART in the Video Lectures section. You may also find it helpful to look up an ASCII table online. 0.1 / 0.1 pts Question 3 What is the ASCII value of a period ('.') in decimal? 23 46 Correct! Correct! 56 None of the above Please review the Lecture 5 - UART in the Video Lectures section. You may also find it helpful to look up an ASCII table online. 0.4 / 0.4 pts Question 4
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Answer 1: Answer 2: Answer 3: Answer 4: In decimal, the ASCII encoding of an upper case 'A' is 65 and the ASCII encoding of a lower case 'a' is 97 . In decimal, the ASCII encoding of an upper case 'Z' is 90 and the ASCII encoding of a lower case 'z' is 122 . 65 Correct! Correct! 97 Correct! Correct! 90 Correct! Correct! 122 Correct! Correct! 0.1 / 0.1 pts Question 5 Which of the following code snippets will branch to the label, is_one , only if bit 0 of $t0 contains the value, 1? Hint: Make sure you understand "bit masking" explained in the video lecture.
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… andi $t0, $t0, 0 beq $t0, $0, is_one nop … # code for when bit 0 of $t0 is zero is_one: … # code for when bit 0 of $t0 is one … andi $t0, $t0, 0 bne $t0, $0, is_one nop … # code for when bit 0 of $t0 is zero is_one: … # code for when bit 0 of $t0 is one … andi $t0, $t0, 1 beq $t0, $0, is_one nop … # code for when bit 0 of $t0 is zero is_one: … # code for when bit 0 of $t0 is one
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… andi $t0, $t0, 1 bne $t0, $0, is_one nop … # code for when bit 0 of $t0 is zero is_one: … # code for when bit 0 of $t0 is one Correct! Correct! Please review http ://progressive-learning- platform. github . io /instructions. html # logicalbitwise - operations (http://progressive-learning- platform.github.io/instructions.html#logicalbitwise- operations) for logical operations as well as Lecture 5 - UART in which bit masking is covered. 0.2 / 0.2 pts Question 6 Suppose $t4 contains the value, 33. Which value can $t5 contain so that $t0 has a value of 1 after the following instruction is executed? slt $t0, $t5, $t 4 33 21 Correct! Correct!
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34 75 None of the above 0 / 0.1 pts Question 7 What does the following instruction do? push $t7 It increments $sp by 4, then copies the value of $t7 to the previous address of $sp . It decrements $sp by 4, then copies the value of $t7 to the previous address of $sp . rrect Answer rrect Answer It increments $sp by 4 and then copies the value of $t7 to the current address of $sp . It decrements $sp by 4 and then copies the value of $t7 to the current address of $sp . u Answered u Answered
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For more information on the push pseudo-op, as well as other PLP pseudo-ops, you can review the table in the PLP manual (http://progressive-learning- platform.github.io/instructions.html#pseudo- operations) that includes the equivalent instructions for most pseudo-ops. You may also want to review Lecture 6 - Modularity and Comparisons . 0.6 / 0.6 pts Question 8 Answer 1: Answer 2: Suppose $sp contains 0x10FFFFFC, $t0 contains 128, and $t1 contains 256. Fill in what the values in the table will be after running the following lines of code. push $t0 push $t1 Address Value 0x10FFFFF8 256 0x10FFFFFC 128 256 Correct! Correct! 0x100 rrect Answer rrect Answer 0x00000100 rrect Answer rrect Answer
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128 Correct! Correct! 0x80 rrect Answer rrect Answer 0x00000020 rrect Answer rrect Answer 0.1 / 0.1 pts Question 9 Suppose you want to make a nested function call (i.e. a call to a function from inside of another function) using a jal rather than a call for performance reasons. How would the push and pop pseudo-ops be proprely ordered along with the jal so that the previous return address isn't lost? pop $ra jal nested_function_label nop push $ra push $ra jal nested_function_label nop pop $ra Correct! Correct! push $ra pop $ra jal nested_function_label nop jal nested_function_label nop pop $ra push $ra
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Correct. It is important to remember that push saves a register onto the stack and pop restores a value from the top of the stack to a register. In order to preserve the return address it should be saved before jumping and restored after returning from the jump- and-link. 0.2 / 0.2 pts Question 10 Based on the information in the project description, before storing each letter in the array your program should convert all letters to... lowercase uppercase Correct! Correct! either is acceptable 0.1 / 0.1 pts Question 11 Based on the information in the project description, if the following two lines of code are added to the skeleton code for Project 3, what will the program do? li $a0, 0
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call project3_print Nothing will happen The string, "Yes" will be displayed on the simulated UART's output. The string, "No" will be displayed on the simulated UART's output. Correct! Correct! The string, "0" will be displayed on the simulated UART's output. 0.1 / 0.1 pts Question 12 Based on the information in the project description, if the following two lines of code are added to the skeleton code for Project 3, what will the program do? li $a0, 1 call project3_print Nothing will happen The string, "Yes" will be displayed on the simulated UART's output. Correct! Correct!
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The string, "No" will be displayed on the simulated UART's output. The string, "1" will be displayed on the simulated UART's output. 0.1 / 0.1 pts Question 13 If the base address of the array was 0x10000014, what would be the address of the element 2 (assume that the array is zero indexed, where element 0 is the first element in the array and each element is 1 word in size)? 0x10000011 0x10000012 0x10000014 0x10000018 0x1000001c Correct! Correct! 0x10000020 0.1 / 0.1 pts Question 14
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Which instruction would you use to read a value from an element in an array? addu li lw Correct! Correct! sw move 0.25 / 0.25 pts Question 15 Which instruction would you use to write a value to an element in an array? addu li lw sw Correct! Correct! move
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0.25 / 0.25 pts Question 16 Which instruction would you use to copy the address of an array (allocated using the .space assembler directive) into a register? Assume a label is placed immediately before the allocated space. addu li Correct! Correct! lw sw move 0.1 / 0.1 pts Question 17 Which instruction would you use to interact with the UART command register? addu li lw sw Correct! Correct! move
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0.1 / 0.1 pts Question 18 Which instruction would you use to interact with the UART status register? addu li lw Correct! Correct! sw move 0.1 / 0.1 pts Question 19 Which instruction would you use to interact with the UART receive buffer? addu li lw Correct! Correct! sw
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move 0.3 / 0.3 pts Question 20 Answer 1: Answer 2: Answer 3: Fill in the memory addresses (in hexadecimal) of the following UART registers/buffers: Command Register: 0x f0000000 Status Register: 0x f0000004 Recieve Buffer: 0x f0000008 f0000000 Correct! Correct! 0xf0000000 rrect Answer rrect Answer f0000004 Correct! Correct! 0xf0000004 rrect Answer rrect Answer f0000008 Correct! Correct! 0xf0000008 rrect Answer rrect Answer
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0.5 / 0.5 pts Question 21 Please download the following attached PLP project file: Mystery PLP Program Part 2 (https://canvas.asu.edu/courses/151283/files/64804425? wrap=1) (https://canvas.asu.edu/courses/151283/files/64804425/download? download_frd=1) (https://canvas.asu.edu/courses/151283/files/64804424? wrap=1) This program has been partially converted into machine code so that its functionality cannot be easily identified by reading it. Your task is to use PLPTool's Watcher Window and CPU Memory Visualizer to see what the output of the program is for a specific input. Please open the attached file in PLPTool and perform the following steps: 1. Modify the first line in the program so that the load immediate instruction sets $t0 to the value, 12 2. Enter simulation mode (the blue button with ">SIM" on it) 3. Open the watcher window (the button with a magnifying glass icon) 4. Add registers $t0 and $s2 to the watcher window 5. Run the program until $t0 is set to the value, 0 6. Open the CPU memory visualizer (from the menu bar: Simulation -> Tools -> Create a PLP CPU Memory Visualizer ) 7. In the memory visualizer, set the base address to the value of $s2 seen in the watcher window and set the signed offset to 40. 8. One of the rows in the memory visualizer should have a green background color and a non-zero value. Convert the value seen in this green cell from hexadecimal to decimal
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What value does this green memory location contain in decimal? NOTE: You must convert this value from hexadecimal to decimal in order to receive credit. 23 Correct! Correct! 23 rrect Answer rrect Answer
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9.1: Instruction Cycles 0 / 0.5 pts Question 1 Select the hardware that is active during the Writeback stage of the instruction cycle: Register File Correct! Correct! Data Memory Program Counter Control Unit u Answered u Answered Instruction Memory ALU 0.5 / 0.5 pts Question 2
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Select the hardware that is active during the Fetch Stage of the instruction cycle: Control Unit ALU Data Memory Program Counter Correct! Correct! Instruction Memory Correct! Correct! Register File
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9.3 Pipeline Hazards 0.2 / 0.2 pts Question 1 What types of hazards does a pipelined processor need to deal with specifically? Select all that apply. Data Hazards Correct! Correct! Control Hazards Correct! Correct! Overflow Hazards Structure Hazards Correct! Correct! Exceptions 0.2 / 0.2 pts Question 2 Forwarding (bypassing) alone can completely avoid stall (bubble) caused by:
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Arithmetic Instructions Correct! Correct! Store Instruction Load Instruction All Instructions Branching Instructions 0.2 / 0.2 pts Question 3 A load instruction can cause a pipeline hazard because: It cannot cause a stall. The memory read operation updates a register near the end of the pipeline Correct! Correct! The address of the next instruction is unknown Two instructions use the same memory address The memory write operation updates a memory location near the end of the pipeline 0 / 0.2 pts Question 4
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Given the following code, what hazards occur? lw $s1, 0($s0) lw $s2, 4($s0) sw $s3, 12($s0) lw $s4, 8($s0) add $s5, $s0, $s3 Control Hazards Structure Hazards None of these. rrect Answer rrect Answer Data Hazards u Answered u Answered 0.2 / 0.2 pts Question 5 A branch instruction can cause a pipeline hazard because: The memory write operation takes too long The address of the next instruction is unknown Correct! Correct! The memory read operation takes too long It cannot cause a stall. Two instructions use the same memory address
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9.4 Branch Prediction 0.2 / 0.2 pts Question 1 What is an advantage of static branch prediction? Low branch prediction accuracy (no better than chance). Simple implementation. Correct! Correct! Increases hardware complexity. Increased performance. High branch prediction accuracy (better than chance) 0.2 / 0.2 pts Question 2 Which of the following describes 2-bit history table branch prediction?
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The next instruction to load after a branch instruction is randomly chosen from instruction memory. Hardware designer specifies to always predict a taken or untaken branch. A history table is used to store multiple bits, mapped to the branch instruction address, indicating the history of the branch behavior. A state machine is used to update the table. Correct! Correct! A history table is used to store a single bit mapped to the branch instruction address, indicating that the branch was previously taken or untaken. 0.2 / 0.2 pts Question 3 What is a disadvantage of static branch prediction? Simple implementation. Increases hardware complexity. Increased performance. High branch prediction accuracy (better than chance) Low branch prediction accuracy (no better than chance). Correct! Correct!
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0.2 / 0.2 pts Question 4 Which of the following describes static branch prediction? The next instruction to load after a branch instruction is randomly chosen from instruction memory. A history table is used to store a single bit mapped to the branch instruction address, indicating that the branch was previously taken or untaken. Hardware designer specifies to always predict a taken or untaken branch. Correct! Correct! A history table is used to store multiple bits, mapped to the branch instruction address, indicating the history of the branch behavior. A state machine is used to update the table. 0.2 / 0.2 pts Question 5 Which of the following describes 1-bit history table branch prediction? Hardware designer specifies to always predict a taken or untaken branch.
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A history table is used to store multiple bits, mapped to the branch instruction address, indicating the history of the branch behavior. A state machine is used to update the table. The next instruction to load after a branch instruction is randomly chosen from instruction memory. A history table is used to store a single bit mapped to the branch instruction address, indicating that the branch was previously taken or untaken. Correct! Correct!
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10.1 Memory Technologies 0.2 / 0.2 pts Question 1 A computer's main memory is typically implemented with what kind of memory technology? Disk DRAM Correct! Correct! SRAM Does not matter. Flash 0.2 / 0.2 pts Question 2 Which of the following types of memory are used for persistent storage across power-cycles? (Select all that apply)
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Magnetic Disk Correct! Correct! Flash Correct! Correct! DRAM SRAM 0.2 / 0.2 pts Question 3 You are designing an internet router that will need to save it's settings between reboots. Which type of memory should be used to save these settings? Does not matter. DRAM SRAM Flash Correct! Correct! 0.2 / 0.2 pts Question 4 Which of the following types of memory is the most expensive?
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SRAM Correct! Correct! DRAM Disk Does not matter. Flash 0.2 / 0.2 pts Question 5 Which of the following types of memory is the slowest? DRAM Does not matter. SRAM Disk Correct! Correct! Flash
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10.2 Memory Hierarchy 0.2 / 0.2 pts Question 1 The pre-loading of instructions into a cache that are near the instruction currently being executed is an example of what kind of locality? Spatial Locality Correct! Correct! Dimensional Locality Web Locality Temporal Locality 0.2 / 0.2 pts Question 2 A level 1 cache is focused on supporting what kind of locality?
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Web Locality Dimensional Locality Temporal Locality Correct! Correct! Spatial Locality 0.2 / 0.2 pts Question 3 The instructions that make up a loop that iterates more than once are kept in a cache. This is an example of what kind of locality? Dimensional Locality Web Locality Temporal Locality Correct! Correct! Spatial Locality 0.2 / 0.2 pts Question 4 An element in an array is accessed in memory. The pre- loading of other data in that array is an example of what kind of locality?
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Spatial Locality Correct! Correct! Temporal Locality Web Locality Dimensional Locality 0.2 / 0.2 pts Question 5 What types of locality are used in memory design? Select all that apply. Spatial locality Correct! Correct! Pipelined locality Web locality Temporal locality Correct! Correct!
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10.3 Cache Performance 0 / 0.2 pts Question 1 Given an 8-word, direct mapped cache, and the sequence of address accesses below, enter the number of misses. 0 12 2 0 12 2 5 u Answered u Answered rrect Answers rrect Answers 3 0.2 / 0.2 pts Question 2 Given an 8-word, direct mapped cache, and the sequence of address accesses below, enter the number of misses.
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17 15 15 15 18 18 3 Correct! Correct! rrect Answers rrect Answers 3 0.2 / 0.2 pts Question 3 Given an 8-word, direct mapped cache, and the sequence of address accesses below, enter the number of misses. 8 20 20 4 20 8 4 Correct! Correct! rrect Answers rrect Answers 4 0.2 / 0.2 pts Question 4
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Given an 8-word, direct mapped cache, and the sequence of address accesses below, enter the number of misses. 1 1 1 14 19 14 3 Correct! Correct! rrect Answers rrect Answers 3 0.2 / 0.2 pts Question 5 Given an 8-word, 2-way set associative cache, and the sequence of address accesses below, enter the number of misses. 14 19 6 19 12 19 4 Correct! Correct! rrect Answers rrect Answers 4
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11.1 Multiprocessing 0.2 / 0.2 pts Question 1 Which of the following products is an example of the MIMD architecture? Graphics Processing Unit MIPS Multi-core processors Correct! Correct! 0.2 / 0.2 pts Question 2 What is the name for an architecture that executes one instruction on many sets of data at a time? MIMD SISD
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MISD SIMD Correct! Correct! 0.2 / 0.2 pts Question 3 Which of the following products operates only using an SIMD architecture? Multi-core processors MIPS Graphics Processing Unit Correct! Correct! 0.2 / 0.2 pts Question 4 What is the name for an architecture that executes one instruction on one set of data at a time? SIMD MISD SISD Correct! Correct! MIMD
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0.2 / 0.2 pts Question 5 What is the name for an architecture that executes several instructions, operating on different sets of data at a time? SISD MIMD Correct! Correct! SIMD MISD
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