EBK FUNDAMENTALS OF ELECTRIC CIRCUITS
6th Edition
ISBN: 8220102801448
Author: Alexander
Publisher: YUZU
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Chapter B.2, Problem 4PP
Evaluate these complex fractions:
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For a band-rejection filter, the response drops below this half power point at two locations as visualised in Figure 7, we need to find these
frequencies. Let's call the lower frequency-3dB point as fr and the higher frequency -3dB point fH. We can then find out the bandwidth as
f=fHfL, as illustrated in Figure 7.
0dB
Af
-3 dB
Figure 7. Band reject filter response diagram
Considering your AC simulation frequency response and referring to Figure 7, measure the following from your AC simulation. 1% accuracy:
(a) Upper-3db Frequency (fH) =
Hz
(b) Lower-3db Frequency (fL) =
Hz
(c) Bandwidth (Aƒ) =
Hz
(d) Quality Factor (Q) =
V₁(t)
ww
ZRI
ZLI
Z12
Zci
Zcz
Figure 4. Notch filter circuit topology
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Consider the second order resonant circuit shown in Figure 4. Impedances ZLIZ C1. ZL2. Z c2 combine together forming a two-stage "band-
reject" filter, so called because it rejects a "band" (aka range) of frequencies. This circuit topology is also commonly referred to as a "band-stop" filter
or "notch" filter.
The output of the DAB receiver block has been approximated via Thevenin's theorem for you as a voltage source Vs (t) and associated series
impedance Z RI
To succeed in our goal, we are going to use an iterative design approach. First we will design the interference rejector, and then repeat the process,
using the output of the interference rejector to check the provided waveform converter works as intended.
1. What is the settling time for your output signal (BRF_OUT)? For this question, We define the settling time as the period of time it has taken for the output to settle into a steady state - ie when your oscillation first decays (aka reduces) to less than approximately 1/20 (5%) of the initial value.
(a) Settling time
Chapter B Solutions
EBK FUNDAMENTALS OF ELECTRIC CIRCUITS
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