EBK SYSTEMS ANALYSIS AND DESIGN
11th Edition
ISBN: 8220102795068
Author: ROSENBLATT
Publisher: CENGAGE L
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Chapter 4, Problem 1DT
Program Plan Intro
Advantages and disadvantages of meetings.
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⚫ your circuit diagrams for your basic bricks, such as AND, OR, XOR gates and 1 bit multiplexers,
⚫ your circuit diagrams for your extended full adder, designed in Section 1 and
⚫ your circuit diagrams for your 8-bit arithmetical-logical unit, designed in Section 2.
1 An Extended Full Adder
In this Section, we are going to design an extended full adder circuit (EFA). That EFA takes 6 one bit inputs: aj, bj,
Cin, Tin, t₁ and to. Depending on the four possible combinations of values on t₁ and to, the EFA produces 3 one bit
outputs: sj, Cout and rout.
The EFA can be specified in principle by a truth table with 26 = 64 entries and 3 outputs. However, as the EFA
ignores certain inputs in certain cases, it is easier to work with the following overview specification, depending only
on t₁ and to in the first place:
t₁ to Description
00
Output Relationship
Ignored
Inputs
Addition Mode
2 Coutsjaj + bj + Cin, Tout= 0
Tin
0 1
Shift Left Mode
Sj = Cin,
Cout=bj, rout = 0
rin, aj
10
1 1
Shift Right…
Show the correct stereochemistry
when needed!!
mechanism:
mechanism:
Show the correct stereochemistry when needed!!
Br
NaOPh
diethyl ether
substitution
In java
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